Patents by Inventor Eric J. Clelland

Eric J. Clelland has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Active interference suppressor utilizing recombinant transmultiplexing
    Patent number: 6819911
    Abstract: An active signal suppression system utilizes multi-rate recombinant transmultiplexer (56) to suppress or cancel an undesired signal (46) from a wideband composite signal (40) to be applied to an analog to digital converter (20). The transmultiplexer (56) includes a first demultiplexer (88,90), multiplier (100), switch (120), and multiplexer (128,130). The demultiplexer and multiplexer each have a poly phase filter and Fast Fourier Transform pair which permit channelization and facilitate the generation of a cancellation signal (145) for suppression of the undesired signal. Signal cancellation circuit (60) receives the composite signal (40) at one input (70) and the cancellation signal (145) at another input (76). A minimum mean square estimation circuit (MMSE) (158) and a second demultiplexer (145, 146) are included in a feedback circuit to provide error correction.
    Type: Grant
    Filed: April 2, 2001
    Date of Patent: November 16, 2004
    Assignee: General Dynamics Decision Systems, Inc.
    Inventors: Eric J. Clelland, Kenneth S. Wreschner
  • Active interference suppressor utilizing recombinant transmultiplexing
    Publication number: 20020142725
    Abstract: An active signal suppression system utilizes multi-rate recombinant transmultiplexer (56) to suppress or cancel an undesired signal (46) from a wideband composite signal (40) to be applied to an analog to digital converter (20). The transmultiplexer (56) includes a first demultiplexer (88,90), multiplier (100), switch (120), and multiplexer (128,130). The demultiplexer and multiplexer each have a poly phase filter and Fast Fourier Transform pair which permit channelization and facilitate the generation of a cancellation signal (145) for suppression of the undesired signal. Signal cancellation circuit (60) receives the composite signal (40) at one input (70) and the cancellation signal (145) at another input (76). A minimum mean square estimation circuit (MMSE) (158) and a second demultiplexer (145, 146) are included in a feedback circuit to provide error correction.
    Type: Application
    Filed: April 2, 2001
    Publication date: October 3, 2002
    Applicant: Motorola, Inc.
    Inventors: Eric J. Clelland, Kenneth S. Wreschner