Abstract: A voltage regulator which has two regulation circuits and a comparator for controlling the two regulation circuits is disclosed. The input of the comparator is connected to a power supply voltage such that the output of the comparator changes states when the power supply voltage reaches a predetermined voltage of around 8 volts. The first regulation circuit is enabled to provide the Vcc from the battery voltage until the power supply voltage reaches around 8 volts which is when the comparator changes states. At that point, the first regulation is disabled and the second regulation circuit is enabled to provide the Vcc voltage from the power supply voltage. Since the power supply voltage never reaches the load dump high voltages, the second pass transistors never gets exposed to a high voltage condition. Also, the first transistor can withstand higher voltages since its base is grounded.

Abstract: A precision oscillator includes a capacitor, a charging current source, a discharging current source, a switch for alternatingly connecting the capacitor to the charging current source and the discharging current source, and a hysteretic comparator connected to the capacitor for producing an oscillating signal responsive to charging and discharging the capacitor. The oscillator may also preferably include a duty cycle controller connected to at least one of the charging current source and the discharging current source for setting the charging current and/or the discharging current to thereby set a duty cycle of the oscillating signal by setting a ratio of the charging and discharging currents. The charging current source may have a current setting input for permitting setting of a charging current to the capacitor, and the discharging current source may have a current setting input for permitting setting of a discharging current from the capacitor.

Abstract: A load transient compensator and method of operating the load transient compensator for reducing the transient response time to a load capable of operating at either of several consumption levels when the load changes its power consumption level. The load transient compensator has a comparator having an output connected to an input of an upper driver and of a lower driver with the output of each of the driver being connected to a gate of a power transistor. When the load is in sleep mode and is about to start being accessed, the upper driver is turned on to turn on its associated transistor to supply additional current to the load, regulated by the comparison circuit. When the load is in the power up mode and it is about to stop being accessed, the lower driver is turned on to turn on its associated transistor to drain current supplied to the load by a supply, regulated by the comparison circuit.

Abstract: A comparator with a built-in offset is disclosed. The claimed comparator includes a bias current circuit, a differential input stage with the built-in of-set, and a hysteresis circuit. The built-in offset is generated by using a resistor in the differential input stage of the comparator such that the resistor is driven by the bias current as well as the current generated by the hysteresis circuit. Additionally, a reset circuit which uses the comparator with the built-in offset is claimed. The reset circuit uses a voltage divider circuit to divide a first input voltage to the comparator. A band-gap voltage reference is used to provide a second input voltage to the comparator. Therefore, the reset circuit generates a reset signal when the divided voltage reaches the value of the band-gap voltage plus the offset. In another embodiment, a comparator having a differential input stage, an output stage, and a bias circuit with a hysteresis circuit is disclosed.

Abstract: A comparator with a built-in offset is disclosed. The comparator includes a bias current circuit, a differential input stage with the built-in offset, and a hysteresis circuit. The built-in offset is generated by using a resistor in the differential input stage of the comparator such that the resistor is driven by the bias current as well as the current generated by the hysteresis circuit. Additionally, a reset circuit which uses the comparator with the built-in offset is described. The reset circuit uses a voltage divider circuit to divide a first input voltage to the comparator. A band-gap voltage reference is used to provide a second input voltage to the comparator. Therefore, the reset circuit generates a reset signal when the divided voltage reaches the value of the band-gap voltage plus the offset. In another embodiment, a comparator having a differential input stage, an output stage, and a bias circuit with a hysteresis circuit is disclosed.

Abstract: A comparator with hysteresis which has a bias current circuit, a differential input stage, and an output stage is disclosed. The differential input stage uses a parallel transistor and an enabling transistor connected in parallel to one of the differential pair transistors to create hysteresis. The parallel transistor and enabling transistor are used to generated an effective offset voltage which must be overcome for the comparator to switch states.

Abstract: A comparator with a built-in hysteresis is disclosed. The comparator has a differential input stage, an output stage, and a bias circuit with a hysteresis circuit. The hysteresis circuit selectively applies a bias voltage to the differential input stage to achieve the hysteresis.

Abstract: A zero current enable circuit and zero current enable method are disclosed. The integrated circuit features at least one sense circuit and a logic gate. The sensing circuit combines a broken band gap reference voltage, a voltage divider, a voltage clamp, a comparator, and a logic gate to generate an enable signal.

Abstract: A method for reducing the transient response time of a voltage regulator when the load attached to it is entering or exiting a lower power consumption level by changing the bandwidth of the voltage regulator without compromising its stability, and a bandwidth regulator for implementing such a method are disclosed, wherein the bandwidth of the voltage regulator is changed based on a signal sent by a control device when it senses that the component is about to change power consumption levels.

Abstract: A comparator with hysteresis which has a bias current circuit, a differential input stage, and an output stage is disclosed. The differential input stage uses a parallel transistor and an enabling transistor connected in parallel to one of the differential pair transistors to create hysteresis. The parallel transistor and enabling transistor are used to generated an effective offset voltage which must be overcome for the comparator to switch states.

Abstract: A precision oscillator constructed from a reference current generator, a charge control stage, a capacitor, a comparator, and a voltage threshold generator is disclosed. The reference current generator generates a reference current which is used by the charge control stage to either charge or discharge the capacitor. The comparator compares the voltage on the capacitor to one of two voltages from the voltage threshold generator. The frequency of oscillation is controlled by an external resistor and an external capacitor. Alternatively, the frequency of oscillation can be controlled by adding or subtracting parallel transistors in a current mirror in the reference current generator.

Abstract: A circuit and method for an integrated multifunction voltage regulator is disclosed. The integrated circuit features a voltage preregulator having a battery input and a Vcc output, a voltage bus for distributing the Vcc voltage, and a plurality of function blocks which are connected to the Vcc buss and are driven by the Vcc voltage. The function blocks include voltage regulators, protected battery switches, band gap voltage references, and reset circuits.

Abstract: A comparator with a built-in hysteresis is disclosed. The comparator has a differential input stage, an output stage, and a bias circuit with a hysteresis circuit. The hysteresis circuit selectively applies a bias voltage to the differential input stage to achieve the hysteresis.

Abstract: A gate drive circuit which has an active voltage clamp is disclosed. The active voltage clamp protects the gate of a power transistor from an electrical over-stress condition. The active voltage clamp includes at least one zener diode connected in series with a current mirror.

Abstract: In an exemplary wand type bar code scanner the scanner circuit includes a first control loop for reducing the LED driving current as the D.C. voltage level supplied to the digitizer tends to exceed a selected D.C. reference value; a second control loop becomes active when the LED is shut off by the first control loop, e.g. in the presence of sunlight. The second control loop controls the gain of the scanner amplifier so that the D.C. reference level at the input to the digitizer circuit is maintained as the scanner scans bar codes in the presence of sunlight but with the LED de-energized.

Abstract: A load transient compensator and method of operating the load transient compensator for reducing the transient response time to a load capable of operating at either of several consumption levels when the load changes its power consumption level . The load transient compensator has a comparator having an output connected to an input of an upper driver and of a lower driver with the output of each of the driver being connected to a gate of a power transistor. When the load is in sleep mode and is about to start being accessed, the upper driver is turned on to turn on its associated transistor to supply additional current to the load, regulated by the comparison circuit. When the load is in the power up mode and it is about to stop being accessed, the lower driver is turned on to turn on its associated transistor to drain current supplied to the load by a supply, regulated by the comparison circuit.

Abstract: A method for reducing the transient response time of a voltage regulator when the load attached to it is entering or exiting a lower power consumption level by changing the bandwidth of the voltage regulator without compromising its stability, and a bandwidth regulator for implementing such a method are disclosed, wherein the bandwidth of the voltage regulator is changed based on a signal sent by a control device when it senses that the component is about to change power consumption levels.