Abstract: In some embodiments, a semiconductor chip can include a substrate, an active wide-bandgap device implemented on the substrate, and a reference wide-bandgap device implemented on the substrate. The reference wide-bandgap device can be configured to provide a response to a condition that also affects the active wide-bandgap device. Such a semiconductor chip can be included in an architecture that allows operation of the active wide-bandgap device based on the response provided by the reference wide-bandgap device.

Abstract: A switching component and switch assembly. The switching component comprises a first control node, a common node, a plurality of intermediate nodes, a second control node, and a capacitive node; a plurality of transistors connected in series between the control node and the common node, one of the plurality of intermediate nodes being defined between each series connected pair of transistors, each transistor of the plurality of transistors having a gate coupled to the second control node; and a plurality of capacitive components, one capacitive component being coupled between each intermediate node and the capacitive node, a voltage at the capacitive node being configured to be varied with a voltage at the second control node such that, at each intermediate node, the capacitive component is configured to accrue an opposite charge to the transistors.

Abstract: Apparatus and methods for low noise amplifiers (LNAs) are provided herein. In certain configurations, an LNA includes a mode control circuit that operates the LNA in one of a plurality of modes including a gain mode and a bypass mode, a gain circuit electrically connected between an input terminal and an output terminal and operable to amplify a radio frequency signal received from the input terminal in the gain mode, and a bypass circuit electrically connected between the input terminal and the output terminal and operable to bypass the gain circuit in the bypass mode. The bypass circuit includes a balun that provides a first amount of compensation for a difference in phase delay between the bypass circuit and the gain circuit, and the LNA further includes a phase compensation circuit operable to provide a second amount of compensation for the difference in phase delay.

Abstract: Apparatus and methods for low noise amplifiers (LNAs) are provided herein. In certain configurations, an LNA includes a mode control circuit that operates the LNA in one of a plurality of modes including a gain mode and a bypass mode, a gain circuit electrically connected between an input terminal and an output terminal and operable to amplify a radio frequency signal received from the input terminal in the gain mode, and a bypass circuit electrically connected between the input terminal and the output terminal and operable to bypass the gain circuit in the bypass mode. The bypass circuit includes a balun that provides a first amount of compensation for a difference in phase delay between the bypass circuit and the gain circuit, and the LNA further includes a phase compensation circuit operable to provide a second amount of compensation for the difference in phase delay.

Abstract: Apparatus and methods for low noise amplifiers (LNAs) are provided herein. In certain configurations, an LNA includes a gain stage and a bypass stage electrically connected in parallel with one another between an input and an output. The bypass stage and the gain stage are selectively activated based on a mode of the LNA. For example, the gain stage provides inverting amplification to an input signal received at the input in a gain mode. Additionally, the bypass stage provides a low gain path from the input to the output in a bypass mode. Additionally, the bypass stage includes a balun that provides inversion to the bypass stage such that a phase delay through the bypass stage is similar to a phase delay of the gain stage.