Abstract: A headset power management system provides robust and low-power operation by detecting various connection conditions by measuring a voltage at the microphone terminal with and without injection of current from the headset. A power management circuit controls an operating state of the headset using a microphone terminal voltage detector and can determine whether a short circuit is present indicating a connection to a device that does not have a microphone input, a negative polarity voltage is present indicating that the device may be determining a connection and type of the headset using the microphone terminal, a normal connection, or whether the headset is not connected to a device at all. Depending on the connection state, some or all of the headset electronics may be disabled until a normal connection is detected. For example the microphone processing circuits may be disabled if the connection does not support a microphone input.

Abstract: A wireless earpiece may include a local memory for storing audio files that can be played back by the user. The wireless earpiece may fit entirely within the user's ear canal. Audio files, for example music files, may be loaded on the wireless earpiece by docking the wireless earpiece with a mobile device, which includes a larger memory storing the user's library of music files. The stored audio files may be received from a mobile device that were automatically selected from a library of music files by the mobile device without intervention from the user. To provide stereo sound, two wireless earpieces may be worn by the user and docked separately with the mobile device. Each of the two wireless earpieces may store a single channel of an audio file, which is separated by the mobile device during synchronization.

Abstract: A wireless earpiece may include a local memory for storing audio files that can be played back by the user. The wireless earpiece may fit entirely within the user's ear canal. Audio files, for example music files, may be loaded on the wireless earpiece by docking the wireless earpiece with a mobile device, which includes a larger memory storing the user's library of music files. The stored audio files may be received from a mobile device that were automatically selected from a library of music files by the mobile device without intervention from the user. To provide stereo sound, two wireless earpieces may be worn by the user and docked separately with the mobile device. Each of the two wireless earpieces may store a single channel of an audio file, which is separated by the mobile device during synchronization.

Abstract: A headset power management system provides robust and low-power operation by detecting various connection conditions by measuring a voltage at the microphone terminal with and without injection of current from the headset. A power management circuit controls an operating state of the headset using a microphone terminal voltage detector and can determine whether a short circuit is present indicating a connection to a device that does not have a microphone input, a negative polarity voltage is present indicating that the device may be determining a connection and type of the headset using the microphone terminal, a normal connection, or whether the headset is not connected to a device at all. Depending on the connection state, some or all of the headset electronics may be disabled until a normal connection is detected. For example the microphone processing circuits may be disabled if the connection does not support a microphone input.

Abstract: A wireless earpiece may include a local memory for storing audio files that can be played back by the user. The wireless earpiece may fit entirely within the user's ear canal. Audio files, for example music files, may be loaded on the wireless earpiece by docking the wireless earpiece with a mobile device, which includes a larger memory storing the user's library of music files. The stored audio files may be received from a mobile device that were automatically selected from a library of music files by the mobile device without intervention from the user. To provide stereo sound, two wireless earpieces may be worn by the user and docked separately with the mobile device. Each of the two wireless earpieces may store a single channel of an audio file, which is separated by the mobile device during synchronization.

Abstract: An interface for an array of digital microphones in an electronic device may include a head-end chip coupled to the digital microphones through a bus. The bus may be shared by each microphone of the array of microphones and be multiplexed to allow transmission of data from the microphones to the head-end chip and transmission of power from the head-end chip to the array of digital microphones. The head-end chip may perform signal processing on receive data from the array of digital microphones to create beamforming arrays. The array of microphones may include microphones with different characteristics to improve performance of the array of microphones.

Abstract: An interface for an array of digital microphones in an electronic device may include a head-end chip coupled to the digital microphones through a bus. The bus may be shared by each microphone of the array of microphones and be multiplexed to allow transmission of data from the microphones to the head-end chip and transmission of power from the head-end chip to the array of digital microphones. The head-end chip may perform signal processing on receive data from the array of digital microphones to create beamforming arrays. The array of microphones may include microphones with different characteristics to improve performance of the array of microphones.

Abstract: A wireless earpiece may include a local memory for storing audio files that can be played back by the user. The wireless earpiece may fit entirely within the user's ear canal. Audio files, for example music files, may be loaded on the wireless earpiece by docking the wireless earpiece with a mobile device, which includes a larger memory storing the user's library of music files. The stored audio files may be received from a mobile device that were automatically selected from a library of music files by the mobile device without intervention from the user. To provide stereo sound, two wireless earpieces may be worn by the user and docked separately with the mobile device. Each of the two wireless earpieces may store a single channel of an audio file, which is separated by the mobile device during synchronization.

Abstract: A wireless earpiece may include a local memory for storing audio files that can be played back by the user. The wireless earpiece may fit entirely within the user's ear canal. Audio files, for example music files, may be loaded on the wireless earpiece by docking the wireless earpiece with a mobile device, which includes a larger memory storing the user's library of music files. The wireless earpiece may also be charged while docked with the mobile device by receiving power from the mobile device's larger battery. To provide stereo sound, two wireless earpieces may be worn by the user and docked separately with the mobile device. Each of the two wireless earpieces may store a single channel of an audio file, which is separated by the mobile device during synchronization.

Abstract: A wireless earpiece may include a local memory for storing audio files that can be played back by the user. The wireless earpiece may fit entirely within the user's ear canal. Audio files, for example music files, may be loaded on the wireless earpiece by docking the wireless earpiece with a mobile device, which includes a larger memory storing the user's library of music files. The wireless earpiece may also be charged while docked with the mobile device by receiving power from the mobile device's larger battery. To provide stereo sound, two wireless earpieces may be worn by the user and docked separately with the mobile device. Each of the two wireless earpieces may store a single channel of an audio file, which is separated by the mobile device during synchronization.

Abstract: An interface for an array of digital microphones in an electronic device may include a head-end chip coupled to the digital microphones through a bus. The bus may be shared by each microphone of the array of microphones and be multiplexed to allow transmission of data from the microphones to the head-end chip and transmission of power from the head-end chip to the array of digital microphones. The head-end chip may perform signal processing on receive data from the array of digital microphones to create beamforming arrays. The array of microphones may include microphones with different characteristics to improve performance of the array of microphones.

Abstract: An interface for an array of digital microphones in an electronic device may include a head-end chip coupled to the digital microphones through a bus. The bus may be shared by each microphone of the array of microphones and be multiplexed to allow transmission of data from the microphones to the head-end chip and transmission of power from the head-end chip to the array of digital microphones. The head-end chip may perform signal processing on receive data from the array of digital microphones to create beamforming arrays. The array of microphones may include microphones with different characteristics to improve performance of the array of microphones.

Abstract: An offset correction circuit removes DC offset from an analog audio output signal by comparing transitions of digital audio values to which the analog output signal is related to the output of a monitor that monitors the analog output signal. The monitor may be a zero-crossing detector and the transitions of the digital signal that are compared may be transitions of the most-significant bit (MSB) of the digital audio values. A filtering algorithm or filter circuit may be used to average a result of the comparison of the transitions, so that the offset is slowly and accurately removed. A chopped or autozero comparator may be used to further reduce error in the offset determination.

Abstract: An audio switching power amplifier having an output pulse voltage selected in conformity with an indication of the output signal amplitude provides lower electromagnetic interference (EMI) in class-D amplifier implementations, in particular, in inductor-less designs. The output pulse voltage may be selected by providing multiple switching circuits, such as half or fully bridge switches, with each switching circuit connected to a different power supply. One of the switching circuits is activated by the switching controller, while the others are disabled, providing selection of the output pulse voltage. Selection of a lower pulse voltage, when the maximum voltage is not required, reduces the generated EMI. The switching frequency of the class-D amplifier may also be controlled in conformity with the output signal amplitude, so that at higher output levels a lower switching rate is selected, reducing the generated EMI.

Abstract: In at least one embodiment, an electronic system includes an amplifier having an on-chip charge pump to provide a gate boost voltage to boost a gate voltage of at least one on-chip field effect transistor (FET) of an output stage of an amplifier. In at least one embodiment, the gate boost voltage boosts the gate voltage higher than the supply voltage rail to increase an overdrive voltage of the on-chip FET. In at least one embodiment, the gate boost voltage boosts the DC bias of an input signal and, thus, generation of gate boost voltage by the on-chip charge pump is signal-independent, i.e. independent of the input signal. Increasing the overdrive voltage increases the efficiency of the amplifier by decreasing the difference between the maximum swing of the output voltage and the voltage supply rails of the at least one on-chip FET relative to conventional designs.

Abstract: A charge pump power supply for an audio power amplifier integrated circuit has an operating mode selected according to an indication of operating environment and/or a process position of the integrated circuit. The operating mode selects the output voltage provided by the charge pump and may also select efficiency by selecting a frequency of operation of the charge pump and/or the effective size of a switching transistor bank. The selection is made in conformity with an indication of a process position of the integrated circuit and/or an indication of an environment of the integrated circuit, such as temperature, power supply voltage and/or load impedance values, and generally also in conformity with a volume (gain) setting, or a detected signal level, so that internal power consumption of the amplifier and charge pump is reduced when a high signal level is not being reproduced at the audio power stage.

Abstract: A delta-sigma analog-to-digital converter (ADC) circuit improves performance by reducing the amount of noise and other error sampled by the reference switching circuit. The reference switching network is operated intermittently only when the charge on an input integrator exceeds a threshold, thereby preventing the input integrator from saturating, while avoiding needlessly injecting reference noise. The input to the ADC may be a current injected directly into a summing node of the integrator, or may be a voltage supplied through another switching network.

Abstract: A delta-sigma analog-to-digital converter (ADC) circuit improves performance by reducing the amount of noise and other error sampled by the reference switching circuit. The reference switching network is operated intermittently only when the charge on an input integrator exceeds a threshold, thereby preventing the input integrator from saturating, while avoiding needlessly injecting reference noise. The input to the ADC may be a current injected directly into a summing node of the integrator, or may be a voltage supplied through another switching network.

Abstract: The electrical circuitry for a multiplier system includes a counter for determining proximity to sampling operation, and a switch to select between symmetrical noise invariant operation and a low-power mode of operation. A noise invariant circuit disables row skip operation in a multi-row multiplier, to enable analog sampling. Disabling of the row skip operation is accomplished at a time which is several digital cycles preceding the time of analog sampling. Power saving multiplier row skippage resumes after analog sampling is completed.

Abstract: The electrical circuitry for a multiplier system includes a counter for determining proximity to sampling operation, and a switch to select between symmetrical noise invariant operation and a low-power mode of operation. A noise invariant circuit disables row skip operation in a multi-row multiplier, to enable analog sampling. Disabling of the row skip operation is accomplished at a time which is several digital cycles preceding the time of analog sampling. Power saving multiplier row skippage resumes after analog sampling is completed.