Patents by Inventor Eric James Shero

Eric James Shero has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 12644178
    Abstract: A method can comprise providing a zinc precursor to a reaction chamber comprising a substrate disposed therein; providing an oxygen species to the reaction chamber; forming a zinc oxide layer on the substrate in response to providing the zinc precursor and providing the oxygen species; and/or mitigating agglomeration of the zinc oxide layer. Mitigating agglomeration of the zinc oxide layer can comprise forming a capping layer on an outer surface of the zinc oxide layer such that the outer surface of the zinc oxide layer is not exposed to ambient oxygen, doping the zinc oxide layer with another material, and/or applying a post-deposition treatment to the zinc oxide layer.
    Type: Grant
    Filed: January 2, 2024
    Date of Patent: June 2, 2026
    Assignee: ASM IP Holding B.V.
    Inventors: Fu Tang, Eric Jen Cheng Liu, Eric James Shero
  • Publication number: 20260132507
    Abstract: The current disclosure relates to the manufacture of semiconductor devices, specifically to methods of forming vanadium metal on a substrate. The methods comprise providing a substrate in a reaction chamber, providing a vanadium precursor to the reaction chamber in a vapor phase and providing a reducing agent to the reaction chamber in a vapor phase to form vanadium metal on the substrate. The disclosure further relates to structures and devices formed by the methods, as well as to a deposition assembly.
    Type: Application
    Filed: January 7, 2026
    Publication date: May 14, 2026
    Inventors: Charles Dezelah, Eric James Shero, Qi Xie, Giuseppe Alessio Verni, Petro Deminskyi
  • Publication number: 20260132511
    Abstract: A reactor system can comprise a substrate carrier, which can be configured to move a substrate within the reactor system, and/or a translating arm; a temperature measurement device; a processor; and/or a tangible, non-transitory memory configured to communicate with the processor having instructions stored thereon that, in response to execution by the processor, cause the processor to perform operations. The temperature measurement device can be coupled to the substrate carrier and/or translating arm, and/or the temperature measurement device can be coupled another component of the reactor system. The temperature measurement device can be configured to measure a temperature of a processed substrate within the reaction system. The processor can perform operations including measuring the temperature of the substrate; and/or comparing the measured temperature with a reference temperature.
    Type: Application
    Filed: November 10, 2025
    Publication date: May 14, 2026
    Inventors: Hannelore Azora Hemminger, Eric James Shero, Todd Robert Dunn
  • Publication number: 20260122999
    Abstract: Threshold voltage (Vt) tuning layers may be sensitive to etching by reactants used to deposit overlying gate material, such as metal nitride. Methods for depositing Vt tuning layers are provided. In some embodiments Vt tuning layers may comprise a Vt tuning material in a neutral matrix. In some embodiments, processes for reducing or eliminating the etching of Vt tuning layers by halide reactants are described. In some embodiments a Vt tuning layer, such as a metal oxide layer, is treated by a nitridation process following deposition and prior to subsequent deposition of a metal nitride capping layer. In some embodiments an etch-protective layer, such as a NbO layer, is deposited over a Vt tuning layer prior to deposition of an overlying metal nitride layer.
    Type: Application
    Filed: April 3, 2025
    Publication date: April 30, 2026
    Inventors: Fu Tang, Eric James Shero, Gejian Zhao, Eric Jen Cheng Liu
  • Publication number: 20260085416
    Abstract: Herein disclosed are systems and methods related to semiconductor processing device including a manifold including a bore configured to deliver a gas to a reaction chamber, the manifold including a first block mounted to a second block, the first and second mounted blocks cooperating to at least partially define the bore. The manifold may further comprise an insulator cap disposed about the first block or the second block. The semiconductor processing device may comprise at least three valve blocks mounted to the second block so that a precursor backflow is prevented. Heater rod(s) can extend through the second block to a location adjacent to the first block.
    Type: Application
    Filed: December 3, 2025
    Publication date: March 26, 2026
    Inventors: Shuyang Zhang, Jereld Lee Winkler, Ankit Kimtee, Eric James Shero, Mimoh Kwatra, Dinkar Nandwana, Todd Robert Dunn, Carl Louis White
  • Patent number: 12571095
    Abstract: Vapor deposition methods and related systems are provided for depositing layers comprising vanadium and oxygen. In some embodiments, the methods comprise contacting a substrate in a reaction space with alternating pulses of a vapor-phase vanadium precursor and a vapor-phase oxygen reactant. The reaction space may be purged, for example, with an inert gas, between reactant pulses. The methods may be used to fill a gap on a substrate surface. Reaction conditions, including deposition temperature and reactant pulse and purge times may be selected to achieve advantageous gap fill properties. In some embodiments, the substrate on which deposition takes place is maintained at a relatively low temperature, for example between about 50° C. and about 185° C.
    Type: Grant
    Filed: April 28, 2023
    Date of Patent: March 10, 2026
    Assignee: ASM IP Holding B.V.
    Inventors: Eric James Shero, Charles Dezelah, Ren-Jie Chang, Qi Xie, Perttu Sippola, Petri Raisanen
  • Patent number: 12563983
    Abstract: Methods and systems for depositing vanadium and/or indium layers onto a surface of a substrate and structures and devices formed using the methods are disclosed. An exemplary method includes using a cyclical deposition process, depositing a vanadium and/or indium layer onto the surface of the substrate. The cyclical deposition process can include providing a vanadium and/or indium precursor to the reaction chamber and separately providing a reactant to the reaction chamber. The cyclical deposition process may desirably be a thermal cyclical deposition process. Exemplary structures can include field effect transistor structures, such as gate all around structures. The vanadium and/or indium layers can be used, for example, as barrier layers or liners, as work function layers, as dipole shifter layers, or the like.
    Type: Grant
    Filed: November 17, 2022
    Date of Patent: February 24, 2026
    Assignee: ASM IP Holding B.V.
    Inventors: Eric James Shero, Michael Eugene Givens, Qi Xie, Charles Dezelah, Giuseppe Alessio Verni
  • Publication number: 20260043134
    Abstract: Apparatus for mixing two or more gases prior to entering a reaction chamber, reactor systems including the apparatus, and methods of using the apparatus and systems are disclosed. The systems and methods as described herein can be used to, for example, pulse a mixture of two or more precursors to a reaction chamber.
    Type: Application
    Filed: October 21, 2025
    Publication date: February 12, 2026
    Inventors: Jereld Lee Winkler, Paul Ma, Eric James Shero
  • Publication number: 20260042130
    Abstract: Various embodiments of the present technology may provide methods and apparatus for cleaning a source vessel. The source vessel may be filled or partially filled with a solvent to form a solution. The solution is removed from the source vessel and contained in a waste vessel that is connected to the source vessel. The waste vessel may have a bellow or other mechanism inside of it to create a negative pressure in the waste vessel to pull the solution out of the source vessel and into the waste vessel. Alternatively, a liquid pump may be used to pull the solution from the source vessel to the waste vessel.
    Type: Application
    Filed: October 16, 2025
    Publication date: February 12, 2026
    Inventors: Jereld Lee Winkler, Paul Ma, Eric James Shero, Shubham Garg, Jonathan Bakke, Todd Dunn, Jacqueline Wrench, Shuaidi Zhang
  • Publication number: 20260047363
    Abstract: A method for depositing an oxide on a substrate, comprising: a) providing the substrate in a chamber; b) initially pulsing a precursor into the chamber to chemisorb a constituent onto a surface of the substrate; c) pulsing an oxygen species into the chamber to form an oxide layer on the surface upon contact with the constituent, wherein the oxygen species comprises an alcohol; and repeating one or more steps b)-c) until the oxide layer is deposited to a desired thickness.
    Type: Application
    Filed: August 6, 2025
    Publication date: February 12, 2026
    Inventors: Kamesh Mullapudi, Austin Way, Eric James Shero, Jessica Akemi Cimada da Silva, Devika Choudhury, Yu Xu, Xiangdong Qin, Jereld Lee Winkler, Mihaela Balseanu
  • Patent number: 12545999
    Abstract: The manufacture of semiconductor devices may include methods of forming vanadium metal on a substrate. The methods comprise providing a substrate in a reaction chamber, providing a vanadium precursor to the reaction chamber in a vapor phase and providing a reducing agent to the reaction chamber in a vapor phase to form vanadium metal on the substrate.
    Type: Grant
    Filed: November 29, 2023
    Date of Patent: February 10, 2026
    Assignee: ASM IP Holding B.V.
    Inventors: Charles Dezelah, Eric James Shero, Qi Xie, Giuseppe Alessio Verni, Petro Deminskyi
  • Patent number: 12546006
    Abstract: A semiconductor processing system for delivering large capacity vaporized precursor from solid or liquid precursor source is disclosed. The system utilizes a carrier gas to feed the vaporized precursor to a remotely located process zone where multiple process modules are disposed. The system comprises a first and second buffer volumes configured to reduce pressure drop and increase delivery rates. A method for delivering a large capacity vaporized precursor to the remotely located process zone are also disclosed.
    Type: Grant
    Filed: August 3, 2022
    Date of Patent: February 10, 2026
    Assignee: ASM IP Holding B.V.
    Inventors: Jereld Lee Winkler, Eric James Shero
  • Publication number: 20260035793
    Abstract: The present disclosure pertains to embodiments of a showerhead assembly which can be used to deposit semiconductor layers using processes such as atomic layer deposition (ALD). The showerhead assembly has a showerhead which has an increased thickness which advantageously decreases reactor chamber size and decreases cycling time. Decreased cycling time can improve throughput and decrease costs.
    Type: Application
    Filed: October 8, 2025
    Publication date: February 5, 2026
    Inventors: Dinkar Nandwana, Eric James Shero, Carl Louis White, William George Petro, Herbert Terhorst, Gnyanesh Trivedi, Mark Olstad, Ankit Kimtee, Kyle Fondurulia, Michael Schmotzer, Jereld Lee Winkler
  • Patent number: 12540391
    Abstract: Herein disclosed are systems and methods related to solid source chemical sublimator vessels and corresponding deposition modules. The solid source chemical sublimator can include a housing configured to hold solid chemical reactant therein. A lid may be disposed on a proximal portion of the housing. The lid can include a fluid inlet and a fluid outlet and define a serpentine flow path within a distal portion of the lid. The lid can be adapted to allow gas flow within the flow path. The solid source chemical sublimator can include a filter that is disposed between the serpentine flow path and the distal portion of the housing. The filter can have a porosity configured to restrict a passage of a solid chemical reactant therethrough.
    Type: Grant
    Filed: June 9, 2023
    Date of Patent: February 3, 2026
    Assignee: ASM IP Holding B.V.
    Inventors: Eric James Shero, Carl Louis White, Mohith E. Verghese, Kyle Fondurulia, Timothy James Sullivan
  • Publication number: 20260022467
    Abstract: Reactor systems and methods for rapidly modulating a temperature of a substrate are disclosed. Exemplary reactor systems can include one more temperature regulating gas sources coupled to a reaction chamber of a reactor. Additionally or alternatively, exemplary reactor systems can include a lift pin assembly that can move a substrate away from a susceptor surface during processing.
    Type: Application
    Filed: July 16, 2025
    Publication date: January 22, 2026
    Inventors: Paul Ma, Todd Robert Dunn, Eric James Shero
  • Publication number: 20260009127
    Abstract: A semiconductor processing device is disclosed. The device can include a reactor and a solid source vessel configured to supply a vaporized solid reactant to the reactor. A process control chamber can be disposed between the solid source vessel and the reactor. The device can include a valve upstream of the process control chamber. A control system can be configured to control operation of the valve based at least in part on feedback of measured pressure in the process control chamber.
    Type: Application
    Filed: September 10, 2025
    Publication date: January 8, 2026
    Inventors: Jereld Lee Winkler, Eric James Shero, Carl Louis White, Shankar Swaminathan, Bhushan Zope
  • Patent number: 12516414
    Abstract: Herein disclosed are systems and methods related to semiconductor processing device including a manifold including a bore configured to deliver a gas to a reaction chamber, the manifold including a first block mounted to a second block, the first and second mounted blocks cooperating to at least partially define the bore. The manifold may further comprise an insulator cap disposed about the first block or the second block. The semiconductor processing device may comprise at least three valve blocks mounted to the second block so that a precursor backflow is prevented. Heater rod(s) can extend through the second block to a location adjacent the first block.
    Type: Grant
    Filed: October 10, 2022
    Date of Patent: January 6, 2026
    Assignee: ASM IP Holding B.V.
    Inventors: Shuyang Zhang, Jereld Lee Winkler, Ankit Kimtee, Eric James Shero, Mimoh Kwatra, Dinkar Nandwana, Todd Robert Dunn, Carl Louis White
  • Publication number: 20260005017
    Abstract: Disclosed herein is a method, system and apparatus for forming, by a cyclic process, a dopant concentration gradient in a doped hafnium zirconium oxide (HZO) layer on a substrate, the cyclic process includes, providing the substrate in a reaction chamber, a) pulsing a hafnium precursor(s) into the reaction chamber, where at least a part of the substrate is contacted with the hafnium precursor(s), b) pulsing a zirconium precursor(s) into the reaction chamber, where at least a part of the substrate is contacted with the zirconium precursor(s), c) pulsing an oxygen reactant(s) into the reaction chamber, where at least a part of the substrate is contacted with the oxygen reactant(s), d) pulsing a dopant precursor(s) into the reaction chamber, where at least a part of the substrate is contacted with the dopant precursor(s), and e) purging the reaction chamber.
    Type: Application
    Filed: June 27, 2025
    Publication date: January 1, 2026
    Inventors: Rohit Abraham John, Fu Tang, Eric James Shero
  • Publication number: 20250369110
    Abstract: Methods for forming a semiconductor structure are disclosed. The methods disclosed include depositing a dipole layer comprising a ternary gallium material on a surface of a high-k dielectric material by a cyclical deposition process. Methods for depositing a dipole layer on a substrate by an atomic layer deposition process are also disclosed. Methods of forming a semiconductor device employing a ternary gallium material are also disclosed.
    Type: Application
    Filed: May 28, 2025
    Publication date: December 4, 2025
    Inventors: Fu Tang, Eric James Shero, Ren-Jie Chang
  • Publication number: 20250361611
    Abstract: A semiconductor device comprising a manifold for uniform vapor deposition is disclosed. The semiconductor device can include a manifold comprising a bore and having an inner wall. The inner wall can at least partially define the bore. A first axial portion of the bore can extend along a longitudinal axis of the manifold. A supply channel can provide fluid communication between a gas source and the bore. The supply channel can comprise a slit defining an at least partially annular gap through the inner wall of the manifold to deliver a gas from the gas source to the bore. The at least partially annular gap can be revolved about the longitudinal axis.
    Type: Application
    Filed: August 7, 2025
    Publication date: November 27, 2025
    Inventors: David Marquardt, Andrew Michael Yednak, III, Eric James Shero, Herbert Terhorst