Patents by Inventor Eric Jonathan Deal
Eric Jonathan Deal has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Publication number: 20240012464Abstract: A microcontroller system includes a processing unit supporting at least one near or sub Vt circuit and a plurality of memory blocks, each memory block connected to a DMA controller and independently power controlled. A power control system uses power gates to power control at least the memory blocks. In some embodiments, a wake-up interrupt controller is connected to the power control system and a voltage regulator system is used to supply voltage to separate power domains, with the voltage regulator systems controlled at least in part by power gates operated by the power control system. A plurality of clocks can be connected to define clock domains associated with separate power domains.Type: ApplicationFiled: September 26, 2023Publication date: January 11, 2024Inventors: Scott McLean Hanson, Daniel Martin Cermak, Eric Jonathan Deal, Stephen James Sheafor, Donovan Scott POPPS, Mark A. Baur
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Patent number: 11822364Abstract: A microcontroller system includes a processing unit supporting at least one near or sub Vt circuit and a plurality of memory blocks, each memory block connected to a DMA controller and independently power controlled. A power control system uses power gates to power control at least the memory blocks. In some embodiments, a wake-up interrupt controller is connected to the power control system and a voltage regulator system is used to supply voltage to separate power domains, with the voltage regulator systems controlled at least in part by power gates operated by the power control system. A plurality of clocks can be connected to define clock domains associated with separate power domains.Type: GrantFiled: May 1, 2020Date of Patent: November 21, 2023Assignee: AMBIQ MICRO, INC.Inventors: Scott McLean, Daniel Martin Cermak, Eric Jonathan Deal, Stephen James Sheafor, Donovan Scott Popps, Mark A Baur
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Publication number: 20220414051Abstract: An apparatus includes an array processor to process array data in response to information contained in a packet, wherein the packet comprises a set of fields specifying configuration information for processing the array.Type: ApplicationFiled: June 28, 2021Publication date: December 29, 2022Inventors: Matthew Brandon Gately, Eric Jonathan Deal, Daniel Thomas Riedler
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Publication number: 20220414050Abstract: An apparatus includes an array processor to process at least one array. The apparatus further includes a memory coupled to the array processor. The at least one array is stored in memory with programmable per-dimension size and stride values.Type: ApplicationFiled: June 28, 2021Publication date: December 29, 2022Inventors: Matthew Brandon Gately, Eric Jonathan Deal, Mark Willard Johnson
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Publication number: 20220413850Abstract: An apparatus includes an array processor to process array data in response to a set of macro-instructions. A macro-instruction in the set of macro-instructions performs loop operations, array iteration operations, and/or arithmetic logic unit (ALU) operations.Type: ApplicationFiled: June 28, 2021Publication date: December 29, 2022Inventors: Matthew Brandon Gately, Eric Jonathan Deal, Mark Willard Johnson, Daniel Thomas Riedler
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Publication number: 20220414049Abstract: An apparatus includes an array processor to process array data. The array data are arranged in a memory. The array data are specified with programmable per-dimension size and stride values.Type: ApplicationFiled: June 28, 2021Publication date: December 29, 2022Inventors: Matthew Brandon Gately, Eric Jonathan Deal, Mark Willard Johnson, Sebastian Ahmed
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Patent number: 10795425Abstract: A microcontroller system includes a processing unit supporting at least one near or sub Vt circuit and a plurality of memory blocks, each memory block connected to a DMA controller and independently power controlled. A power control system uses power gates to power control at least the memory blocks. In some embodiments, a wake-up interrupt controller is connected to the power control system and a voltage regulator system is used to supply voltage to separate power domains, with the voltage regulator systems controlled at least in part by power gates operated by the power control system. A plurality of clocks can be connected to define clock domains associated with separate power domains.Type: GrantFiled: June 11, 2018Date of Patent: October 6, 2020Assignee: Ambiq Micro, Inc.Inventors: Scott McLean Hanson, Daniel Martin Cermak, Eric Jonathan Deal, Stephen James Sheafor, Donovan Scott Popps, Mark A Baur
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Patent number: 10788884Abstract: A microcontroller system includes a processing unit supporting at least one near or sub Vt circuit and a plurality of memory blocks, each memory block connected to a DMA controller and independently power controlled. A power control system uses power gates to power control at least the memory blocks. In some embodiments, a wake-up interrupt controller is connected to the power control system and a voltage regulator system is used to supply voltage to separate power domains, with the voltage regulator systems controlled at least in part by power gates operated by the power control system. A plurality of clocks can be connected to define clock domains associated with separate power domains.Type: GrantFiled: June 20, 2018Date of Patent: September 29, 2020Assignee: AMBIQ MICRO, INC.Inventors: Scott McLean Hanson, Daniel Martin Cermak, Eric Jonathan Deal, Stephen James Sheafor, Donovan Scott Popps, Mark A Baur
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Patent number: 10754414Abstract: A microcontroller system includes a processing unit supporting at least one near or sub Vt circuit and a plurality of memory blocks, each memory block connected to a DMA controller and independently power controlled. A power control system uses power gates to power control at least the memory blocks. In some embodiments, a wake-up interrupt controller is connected to the power control system and a voltage regulator system is used to supply voltage to separate power domains, with the voltage regulator systems controlled at least in part by power gates operated by the power control system. A plurality of clocks can be connected to define clock domains associated with separate power domains.Type: GrantFiled: March 22, 2018Date of Patent: August 25, 2020Assignee: Ambiq Micro, Inc.Inventors: Scott McLean Hanson, Daniel Martin Cermak, Eric Jonathan Deal, Stephen James Sheafor, Donovan Scott Popps, Mark A Baur
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Publication number: 20200257352Abstract: A microcontroller system includes a processing unit supporting at least one near or sub Vt circuit and a plurality of memory blocks, each memory block connected to a DMA controller and independently power controlled. A power control system uses power gates to power control at least the memory blocks. In some embodiments, a wake-up interrupt controller is connected to the power control system and a voltage regulator system is used to supply voltage to separate power domains, with the voltage regulator systems controlled at least in part by power gates operated by the power control system. A plurality of clocks can be connected to define clock domains associated with separate power domains.Type: ApplicationFiled: May 1, 2020Publication date: August 13, 2020Inventors: Scott McLean Hanson, Daniel Martin Cermak, Eric Jonathan Deal, Stephen James Sheafor, Donovan Scott Popps, Mark A. Baur
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Publication number: 20190079574Abstract: A microcontroller system includes a processing unit supporting at least one near or sub Vt circuit and a plurality of memory blocks, each memory block connected to a DMA controller and independently power controlled. A power control system uses power gates to power control at least the memory blocks. In some embodiments, a wake-up interrupt controller is connected to the power control system and a voltage regulator system is used to supply voltage to separate power domains, with the voltage regulator systems controlled at least in part by power gates operated by the power control system. A plurality of clocks can be connected to define clock domains associated with separate power domains.Type: ApplicationFiled: June 11, 2018Publication date: March 14, 2019Inventors: Scott McLean Hanson, Daniel Martin Cermak, Eric Jonathan Deal, Stephen James Sheafor, Donovan Scott Popps, Mark A. Baur
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Publication number: 20190079573Abstract: A microcontroller system includes a processing unit supporting at least one near or sub Vt circuit and a plurality of memory blocks, each memory block connected to a DMA controller and independently power controlled. A power control system uses power gates to power control at least the memory blocks. In some embodiments, a wake-up interrupt controller is connected to the power control system and a voltage regulator system is used to supply voltage to separate power domains, with the voltage regulator systems controlled at least in part by power gates operated by the power control system. A plurality of clocks can be connected to define clock domains associated with separate power domains.Type: ApplicationFiled: March 22, 2018Publication date: March 14, 2019Inventors: Scott McLean Hanson, Daniel Martin Cermak, Eric Jonathan Deal, Stephen James Sheafor, Donovan Scott Popps, Mark A. Baur
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Publication number: 20190079575Abstract: A microcontroller system includes a processing unit supporting at least one near or sub Vt circuit and a plurality of memory blocks, each memory block connected to a DMA controller and independently power controlled. A power control system uses power gates to power control at least the memory blocks. In some embodiments, a wake-up interrupt controller is connected to the power control system and a voltage regulator system is used to supply voltage to separate power domains, with the voltage regulator systems controlled at least in part by power gates operated by the power control system. A plurality of clocks can be connected to define clock domains associated with separate power domains.Type: ApplicationFiled: June 20, 2018Publication date: March 14, 2019Inventors: Scott McLean Hanson, Daniel Martin Cermak, Eric Jonathan Deal, Stephen James Sheafor, Donovan Scott Popps, Mark A. Baur
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Patent number: 6442643Abstract: A communication system for transferring (Peripheral Component Interconnect) PCI and non-PCI data over a non-PCI bus is disclosed. The system bus is a non-PCI bus having an address bus and a data bus for communicating addresses and data. A PCI-compatible peripheral is coupled to the non-PCI bus for transmitting and receiving PCI-compatible data. A non-PCI device is also coupled to the non-PCI bus for transmitting and receiving non-PCI data. In addition, a slave device is also coupled to the non-PCI bus for receiving and transmitting non-PCI data and PCI data. A byte size control line capable of being driven by the PCI-compatible peripheral and the non-PCI device is coupled between the PCI-compatible peripheral, the non-PCI device, and the slave device for indicating whether data appearing on the data bus is from the PCI-compatible peripheral or the non-PCI device, and for indicating how many bytes on the data bus are actually valid, if the data appearing on the non-PCI bus is from the non-PCI device.Type: GrantFiled: September 30, 1999Date of Patent: August 27, 2002Assignee: Conexant Systems, Inc.Inventor: Eric Jonathan Deal