Abstract: A method for fabricating a semiconductor device including: forming a block layer above a well region of a first doping type in a semiconductor substrate, wherein the block layer has an opening for defining a first region in an upper part of the well region and has sidewalls at sides of the opening; implanting dopants of a second doping type into the well region through the opening of the block layer to form the first region; implanting dopants of the first doping type into the first region in the manner of large-angle-tilt dopants implantation to form a second region for a first transistor, and to form a third region for a second transistor; and forming, for both of the first transistor and the second transistor, a fourth region between the second region and the third region.

Abstract: A method for fabricating a LDMOS device in a semiconductor substrate of a first doping type, including: implanting a series of dopants into the semiconductor substrate using a first mask, and forming a first region of a second doping type adjacent to the surface of the semiconductor substrate, a second region of the first doping type located beneath the first region, and a third region of the second doping type located beneath the second region; implanting dopants into the semiconductor substrate using a second mask, and forming a fourth region of the second doping type adjacent to the first, second and third regions, wherein the fourth region extends from the surface of the semiconductor substrate to approximately the same depth as the third region; and implanting dopants into the first region using a third mask, and form a first well of the first doping type.

Abstract: A semiconductor device has: a gate region having a dielectric layer and a conducting layer; an N-type drain region having a lightly doped drift region and a highly doped drain contact region formed in the drift region, wherein the drain region is at a first side of the gate region; a P-type body region adjacent to the drain region, the body region having a lightly doped first portion body region, a second portion body region, and a highly doped body contact region; and an N-type highly doped source region in the body region, wherein the source region is at a second side of the gate region; wherein the first portion body region is doped with boron, the second portion body region is doped with boron and indium in the first portion body region, and the second portion body region is located adjacent to and beneath the source region.

Abstract: A semiconductor device has: a gate region having a dielectric layer and a conducting layer; an N-type drain region having a lightly doped drift region and a highly doped drain contact region formed in the drift region, wherein the drain region is at a first side of the gate region; a P-type body region adjacent to the drain region, the body region having a lightly doped first portion body region, a second portion body region, and a highly doped body contact region; and an N-type highly doped source region in the body region, wherein the source region is at a second side of the gate region; wherein the first portion body region is doped with boron, the second portion body region is doped with boron and indium in the first portion body region, and the second portion body region is located adjacent to and beneath the source region.