Patents by Inventor Eric King

Eric King has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20250277554
    Abstract: A cooling system. The system includes a conduit configured to carry a cryogenic fluid to a cooling target and a support supporting the conduit. The support includes a first clamp for clamping the conduit in place and a first weight for dampening vibrations in the conduit, wherein the support dampens nm-scale vibrations.
    Type: Application
    Filed: March 3, 2025
    Publication date: September 4, 2025
    Inventors: Thomas Bapu, Eric King, Robert William Scites, IV
  • Patent number: 11359049
    Abstract: The present invention provides novel methods and processes for polymerizing unsaturated substrates, such as alkyne bearing monomers, with arenes. The polymerizations are catalyzed by gold (Au) catalysts/complexes and/or other cocatalysts. The invention further provides novel structurally complex polymers prepared in high yield via an intermolecular polyhydroarylation mechanism. Such resulting products comprise oligomeric and polymeric materials with novel molecular architectures and microstructures, which subsequently impart unique properties. The invention includes both the synthesis methods and processes and the resulting compounds and compositions of matter.
    Type: Grant
    Filed: July 10, 2020
    Date of Patent: June 14, 2022
    Assignee: THE UNIVERSITY OF SOUTHERN MISSISSIPPI
    Inventors: Jason D. Azoulay, Joshua Tropp, Eric King
  • Publication number: 20200407489
    Abstract: The present invention provides novel methods and processes for polymerizing unsaturated substrates, such as alkyne bearing monomers, with arenes. The polymerizations are catalyzed by gold (Au) catalysts/complexes and/or other cocatalysts. The invention further provides novel structurally complex polymers prepared in high yield via an intermolecular polyhydroarylation mechanism. Such resulting products comprise oligomeric and polymeric materials with novel molecular architectures and microstructures, which subsequently impart unique properties. The invention includes both the synthesis methods and processes and the resulting compounds and compositions of matter.
    Type: Application
    Filed: July 10, 2020
    Publication date: December 31, 2020
    Applicant: The University of Southern Mississippi
    Inventors: Jason D. Azoulay, Joshua Tropp, Eric King
  • Patent number: 10711092
    Abstract: The present invention provides novel methods and processes for polymerizing unsaturated substrates, such as alkyne bearing monomers, with arenes. The polymerizations are catalyzed by gold (Au) catalysts/complexes and/or other cocatalysts. The invention further provides novel structurally complex polymers prepared in high yield via an intermolecular polyhydroarylation mechanism. Such resulting products comprise oligomeric and polymeric materials with novel molecular architectures and microstructures, which subsequently impart unique properties. The invention includes both the synthesis methods and processes and the resulting compounds and compositions of matter.
    Type: Grant
    Filed: September 21, 2018
    Date of Patent: July 14, 2020
    Assignee: The University of Southern Mississippi
    Inventors: Jason D. Azoulay, Joshua Tropp, Eric King
  • Patent number: 10560114
    Abstract: Embodiments of the invention include an oversampling Analog to Digital Converter that uses uneven non-overlapping clock phases to reduce switched capacitor circuit power consumption. A return-to-zero sub phase of one of the clock phases may also be used for feedback reference capacitors. A delay lock loop may be combined with the non-overlapping clock phase generator to control accurate timing.
    Type: Grant
    Filed: October 29, 2018
    Date of Patent: February 11, 2020
    Assignee: Avnera Corporation
    Inventors: Jianping Wen, Ali Hadiashar, Eric King, David Entrikin, Wai Lang Lee
  • Patent number: 10505454
    Abstract: The overall performance of single input multiple output (SIMO) switching DC-DC power converters may be improved by controlling power and output switches to adjust inductor current delivered to one output while maintaining substantially constant the current delivered to other outputs, thereby reducing cross regulation interference across outputs. Power converter systems of this disclosure may be configured to calculate an inductor current value and a duty cycle value based on voltages at each of the voltage outputs. The power converter systems may be configured to control at least one main power switch to increase or decrease the current in the inductor based on the calculated inductor current value. Additionally, the power converter systems may be configured to control at least one output power switch to divert current from the inductor to one of the plurality of output nodes based on the calculated duty cycle value.
    Type: Grant
    Filed: December 19, 2018
    Date of Patent: December 10, 2019
    Assignee: Cirrus Logic, Inc.
    Inventors: Xin Zhao, John L. Melanson, Eric King, Xiaofan Fei
  • Patent number: 10425053
    Abstract: A Class G amplifier system including a processing unit configured to receive an input signal and output a delayed processed input signal, a class G amplifier configured to receive the delayed processed input signal, and a power supply. The power supply includes a regulator configured to operate in a plurality of configurations, each configuration outputs a different supply voltage to the class G amplifier and a control circuit configured to receive the input signal and determine the supply voltage required from the regulator when the delayed processed input signal is received at the class G amplifier, and output a signal to the regulator to indicate the required configuration for the required supply voltage.
    Type: Grant
    Filed: December 29, 2017
    Date of Patent: September 24, 2019
    Assignee: AVNERA CORPORATION
    Inventors: Garry N. Link, Eric King, Xudong Zhao, Wai Lee, Alexander C. Stange, Amit Kumar
  • Publication number: 20190207575
    Abstract: A Class G amplifier system including a processing unit configured to receive an input signal and output a delayed processed input signal, a class G amplifier configured to receive the delayed processed input signal, and a power supply. The power supply includes a regulator configured to operate in a plurality of configurations, each configuration outputs a different supply voltage to the class G amplifier and a control circuit configured to receive the input signal and determine the supply voltage required from the regulator when the delayed processed input signal is received at the class G amplifier, and output a signal to the regulator to indicate the required configuration for the required supply voltage.
    Type: Application
    Filed: March 7, 2019
    Publication date: July 4, 2019
    Inventors: Garry N. Link, Eric King, Xudong Zhao, Wai Lee, Alexander C. Stange, Amit Kumar
  • Publication number: 20190199215
    Abstract: The overall performance of single input multiple output (SIMO) switching DC-DC power converters may be improved by controlling power and output switches to adjust inductor current delivered to one output while maintaining substantially constant the current delivered to other outputs, thereby reducing cross regulation interference across outputs. Power converter systems of this disclosure may be configured to calculate an inductor current value and a duty cycle value based on voltages at each of the voltage outputs. The power converter systems may be configured to control at least one main power switch to increase or decrease the current in the inductor based on the calculated inductor current value. Additionally, the power converter systems may be configured to control at least one output power switch to divert current from the inductor to one of the plurality of output nodes based on the calculated duty cycle value.
    Type: Application
    Filed: December 19, 2018
    Publication date: June 27, 2019
    Applicant: Cirrus Logic International Semiconductor Ltd.
    Inventors: Xin Zhao, John L. Melanson, Eric King, Xiaofan Fei
  • Publication number: 20190173486
    Abstract: Embodiments of the invention include an oversampling Analog to Digital Converter that uses uneven non-overlapping clock phases to reduce switched capacitor circuit power consumption. A return-to-zero sub phase of one of the clock phases may also be used for feedback reference capacitors. A delay lock loop may be combined with the non-overlapping clock phase generator to control accurate timing.
    Type: Application
    Filed: October 29, 2018
    Publication date: June 6, 2019
    Inventors: Jianping Wen, Ali Hadiashar, Eric King, David Entrikin, Wai Lang Lee
  • Patent number: 10249283
    Abstract: The handling of disturbances to audio signals may be improved with an adaptive noise cancellation (ANC) system that performs tone suppression and howl suppression in a collaborative manner. Such ANC systems may be configured to detect a first tone in an input signal at a first tone frequency and extract the detected first tone from the input signal. The ANC systems may also be configured to adaptively filter the extracted first tone to generate a second tone that has a magnitude that is approximately equal to a magnitude of the extracted first tone and a phase that is approximately opposite the phase of the extracted first tone. The ANC systems may be further configured to add the second tone to an intermediate signal that is based, at least in part, on the input signal to generate the output signal.
    Type: Grant
    Filed: August 4, 2017
    Date of Patent: April 2, 2019
    Assignee: Cirrus Logic, Inc.
    Inventors: Dayong Zhou, Yang Lu, Jeffrey D. Alderson, Eric King
  • Publication number: 20190085119
    Abstract: The present invention provides novel methods and processes for polymerizing unsaturated substrates, such as alkyne bearing monomers, with arenes. The polymerizations are catalyzed by gold (Au) catalysts/complexes and/or other cocatalysts. The invention further provides novel structurally complex polymers prepared in high yield via an intermolecular polyhydroarylation mechanism. Such resulting products comprise oligomeric and polymeric materials with novel molecular architectures and microstructures, which subsequently impart unique properties. The invention includes both the synthesis methods and processes and the resulting compounds and compositions of matter.
    Type: Application
    Filed: September 21, 2018
    Publication date: March 21, 2019
    Inventors: Jason D. Azoulay, Joshua Tropp, Eric King
  • Patent number: 10230343
    Abstract: A Class G amplifier system including a processing unit configured to receive an input signal and output a delayed processed input signal, a class G amplifier configured to receive the delayed processed input signal, and a power supply. The power supply includes a regulator configured to operate in a plurality of configurations, each configuration outputs a different supply voltage to the class G amplifier and a control circuit configured to receive the input signal and determine the supply voltage required from the regulator when the delayed processed input signal is received at the class G amplifier, and output a signal to the regulator to indicate the required configuration for the required supply voltage.
    Type: Grant
    Filed: December 29, 2017
    Date of Patent: March 12, 2019
    Assignee: AVNERA CORPORATION
    Inventors: Garry N. Link, Eric King, Xudong Zhao, Wai Lee, Alexander C. Stange, Amit Kumar
  • Patent number: 10224952
    Abstract: Embodiments of the invention include an oversampling Analog to Digital Converter that uses uneven non-overlapping clock phases to reduce switched capacitor circuit power consumption. A return-to-zero sub phase of one of the clock phases may also be used for feedback reference capacitors. A delay lock loop may be combined with the non-overlapping clock phase generator to control accurate timing.
    Type: Grant
    Filed: April 18, 2017
    Date of Patent: March 5, 2019
    Assignee: AVNERA CORPORATION
    Inventors: Jianping Wen, Ali Hadiashar, Eric King, David Entrikin, Wai Lang Lee
  • Publication number: 20190043467
    Abstract: The handling of disturbances to audio signals may be improved with an adaptive noise cancellation (ANC) system that performs tone suppression and howl suppression in a collaborative manner. Such ANC systems may be configured to detect a first tone in an input signal at a first tone frequency and extract the detected first tone from the input signal. The ANC systems may also be configured to adaptively filter the extracted first tone to generate a second tone that has a magnitude that is approximately equal to a magnitude of the extracted first tone and a phase that is approximately opposite the phase of the extracted first tone. The ANC systems may be further configured to add the second tone to an intermediate signal that is based, at least in part, on the input signal to generate the output signal.
    Type: Application
    Filed: August 4, 2017
    Publication date: February 7, 2019
    Applicant: Cirrus Logic International Semiconductor Ltd.
    Inventors: Dayong Zhou, Yang Lu, Jeffrey D. Alderson, Eric King
  • Publication number: 20180198430
    Abstract: A Class G amplifier system including a processing unit configured to receive an input signal and output a delayed processed input signal, a class G amplifier configured to receive the delayed processed input signal, and a power supply. The power supply includes a regulator configured to operate in a plurality of configurations, each configuration outputs a different supply voltage to the class G amplifier and a control circuit configured to receive the input signal and determine the supply voltage required from the regulator when the delayed processed input signal is received at the class G amplifier, and output a signal to the regulator to indicate the required configuration for the required supply voltage.
    Type: Application
    Filed: December 29, 2017
    Publication date: July 12, 2018
    Inventors: Garry N. Link, Eric King, Xudong Zhao, Wai Lee, Alexander C. Stange, Amit Kumar
  • Publication number: 20170250703
    Abstract: Embodiments of the invention include an oversampling Analog to Digital Converter that uses uneven non-overlapping clock phases to reduce switched capacitor circuit power consumption. A return-to-zero sub phase of one of the clock phases may also be used for feedback reference capacitors. A delay lock loop may be combined with the non-overlapping clock phase generator to control accurate timing.
    Type: Application
    Filed: April 18, 2017
    Publication date: August 31, 2017
    Inventors: Jianping Wen, Ali Hadiashar, Eric King, David Entrikin, Wai Lang Lee
  • Patent number: 9713206
    Abstract: An LED lighting device includes an auxiliary power supply that supplies power to a control circuit of the LED lighting device that receives an input from a terminal of a light-emitting diode (LED) string of the lighting device that has a substantially lower voltage than the line voltage to which the lighting device is connected. The terminal may be within the LED string, or may be an end of the string. A linear regulator may be operated from the voltage drop across a number of the LEDs in the string so that the energy wasted by the auxiliary power supply is minimized. In other designs, the auxiliary power supply may be intermittently connected in series with the LED string only when needed. The intermittent connection can be used to forward bias a portion of the LED string when the voltage supplied to the LED string is low, increasing overall brightness.
    Type: Grant
    Filed: July 16, 2015
    Date of Patent: July 18, 2017
    Assignee: PHILIPS LIGHTING HOLDING B.V.
    Inventors: John L. Melanson, Eric King, Rahul Singh
  • Patent number: 9628106
    Abstract: Embodiments of the invention include an oversampling Analog to Digital Converter that uses uneven non-overlapping clock phases to reduce switched capacitor circuit power consumption. A return-to-zero sub phase of one of the clock phases may also be used for feedback reference capacitors. A delay lock loop may be combined with the non-overlapping clock phase generator to control accurate timing.
    Type: Grant
    Filed: January 26, 2016
    Date of Patent: April 18, 2017
    Assignee: AVNERA CORPORATION
    Inventors: Jianping Wen, Ali Hadiashar, Eric King, David Entrikin, Wai Lang Lee
  • Patent number: 9504111
    Abstract: A line-frequency determining circuit for coupling to the output of a thyristor-switched dimmer that determines a line-frequency of an AC power source that supplies an input to the thyristor-controlled dimmer permits accurate control of periodic probing of the dimmer output. The probing is performed to predict zero-cross times of the AC power source that, in turn, are used to determine a dimming control value of the thyristor-switched dimmer. A minimum conductance is applied across the output of the dimmer during the probing intervals that begin at the turn-on time of the dimmer and last until enough information has been gathered to correctly predict a next zero crossing of the AC line voltage that supplies the input of the dimmer. The probing can be performed at intervals of an odd number of half-cycles of the AC line frequency so that internal dimmer timer operation is not affected by DC offset.
    Type: Grant
    Filed: December 4, 2014
    Date of Patent: November 22, 2016
    Assignee: KONINKLIJKE PHILIPS N.V.
    Inventors: Eric King, John L. Melanson