Patents by Inventor Eric Kunze
Eric Kunze has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Publication number: 20240149663Abstract: The technology disclosed by the invention relates to a pressure vessel system for a motor vehicle for storing fuel, comprising a plurality of pressure vessels (100) that are combined to a pressure vessel assembly (10), the pressure vessels (100), when mounted, being arranged substantially in parallel relative to each other, and the pressure vessels (100) being fluidically interconnected via a common fuel line (200).Type: ApplicationFiled: February 15, 2022Publication date: May 9, 2024Inventors: Oemer AHMET-TSAOUS, Peter BARTL, Olivier COUSIGNE, Christopher DETMAR, Timo GUTMANN, Eric HENDEL, Joerg HENNECKE, Klaas KUNZE, Lydia MORAL GRACI, Andreas PELGER, Klaus SZOUCSEK, Alexander ZOTTER
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Patent number: 11948069Abstract: A processor arranged to compress neural network activation data comprising an input module for obtaining neural network activation data. The processor also comprises a block creation module arranged to split the neural network activation data into a plurality of blocks; and a metadata generation module for generating metadata associated with at least one of the plurality of blocks. Based on the metadata generated a selection module selects a compression scheme for each of the plurality of blocks, and a compression module for applying the selected compression scheme to the corresponding block to produce compressed neural network activation data. An output module is also provided for outputting the compressed neural network activation data.Type: GrantFiled: July 22, 2019Date of Patent: April 2, 2024Assignee: Arm LimitedInventors: Lingchuan Meng, John Wakefield Brothers, III, Jens Olson, Jared Corey Smolens, Eric Kunze, Ian Rudolf Bratt
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Patent number: 11620516Abstract: The present disclosure advantageously provides a heterogenous system, and a method for generating an artificial neural network (ANN) for a heterogenous system. The heterogenous system includes a plurality of processing units coupled to a memory configured to store an input volume. The plurality of processing units includes first and second processing units. The first processing unit includes a first processor and is configured to execute a first ANN, and the second processing unit includes a second processor and is configured to execute a second ANN. The first and second ANNs respectively include an input layer, at least one processor-optimized hidden layer and an output layer. The second ANN hidden layers are different than the first ANN hidden layers.Type: GrantFiled: December 23, 2019Date of Patent: April 4, 2023Assignee: Arm LimitedInventors: Danny Daysang Loh, Lingchuan Meng, Naveen Suda, Eric Kunze, Ahmet Fatih Inci
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Publication number: 20230084603Abstract: Aspects of the present disclosure relate to apparatus comprising execution circuitry comprising at least one execution unit to execute program instructions, and control circuitry. The control circuitry receives a stream of processing instructions, and issues each received instruction to one of said at least one execution unit. Responsive to determining that a first type of context switch is to be performed from an initial context to a new context, issuing continues until a pre-emption point in the stream of processing instructions is reached. Responsive to reaching the pre-emption point, state information is stored, and the new context is switched to. Responsive to determining that a context switch is to be performed to return from the new context to the initial context, the processing status is restored from the state information, and the stream of processing instructions is continued.Type: ApplicationFiled: September 14, 2021Publication date: March 16, 2023Inventors: Eric KUNZE, Jared Corey SMOLENS, Aaron DEBATTISTA, Elliot Maurice Simon ROSEMARINE
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Patent number: 11127110Abstract: A display controller 93 in a data processing system includes a timewarp module (transformation circuitry) 100 that is operable to perform timewarp processing of a rendered frame 92 generated by a graphics processor (GPU) 91 for provision to a display panel 94. The timewarp module (transformation circuitry) 100 operates to transform an input surface 92 read by the display controller 93 based on received view orientation data to provide an appropriately “timewarped” transformed version of the input surface as an output transformed surface for display on the display 94.Type: GrantFiled: March 1, 2017Date of Patent: September 21, 2021Assignees: Arm Limited, Apical LimitedInventors: Ian Rudolf Bratt, Alexander Eugene Chalfin, Eric Kunze, Paul Stanley Hughes, Alex Kornienko, Damian Piotr Modrzyk, Metin Gokhan Ünal, Jonathan Adam Lawton
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Publication number: 20210192337Abstract: The present disclosure advantageously provides a heterogenous system, and a method for generating an artificial neural network (ANN) for a heterogenous system. The heterogenous system includes a plurality of processing units coupled to a memory configured to store an input volume. The plurality of processing units includes first and second processing units. The first processing unit includes a first processor and is configured to execute a first ANN, and the second processing unit includes a second processor and is configured to execute a second ANN. The first and second ANNs respectively include an input layer, at least one processor-optimized hidden layer and an output layer. The second ANN hidden layers are different than the first ANN hidden layers.Type: ApplicationFiled: December 23, 2019Publication date: June 24, 2021Applicant: Arm LimitedInventors: Danny Daysang Loh, Lingchuan Meng, Naveen Suda, Eric Kunze, Ahmet Fatih Inci
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Publication number: 20210027148Abstract: A processor arranged to compress neural network activation data comprising an input module for obtaining neural network activation data. The processor also comprises a block creation module arranged to split the neural network activation data into a plurality of blocks; and a metadata generation module for generating metadata associated with at least one of the plurality of blocks. Based on the metadata generated a selection module selects a compression scheme for each of the plurality of blocks, and a compression module for applying the selected compression scheme to the corresponding block to produce compressed neural network activation data. An output module is also provided for outputting the compressed neural network activation data.Type: ApplicationFiled: July 22, 2019Publication date: January 28, 2021Inventors: Lingchuan MENG, John Wakefield BROTHERS, III, Jens OLSON, Jared Corey SMOLENS, Eric KUNZE, Ian Rudolf BRATT
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Publication number: 20180253868Abstract: A display controller 93 in a data processing system includes a timewarp module (transformation circuitry) 100 that is operable to perform timewarp processing of a rendered frame 92 generated by a graphics processor (GPU) 91 for provision to a display panel 94. The timewarp module (transformation circuitry) 100 operates to transform an input surface 92 read by the display controller 93 based on received view orientation data to provide an appropriately “timewarped” transformed version of the input surface as an output transformed surface for display on the display 94.Type: ApplicationFiled: March 1, 2017Publication date: September 6, 2018Applicants: ARM Limited, APICAL LIMITEDInventors: Ian Rudolf Bratt, Alexander Eugene Chalfin, Eric Kunze, Paul Stanley Hughes, Alex Kornienko, Damian Piotr Modrzyk, Metin Gokhan Ünal, Jonathan Adam Lawton
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Patent number: 7034837Abstract: Compositors are identified in a manner that defines the position of the compositor in the compositor tree. Each compositor has its own “unique compositor identifier”. Starting at the most downstream compositor, it transmits its unique compositor identifier to all upstream compositors directly coupled to it. The upstream compositors receive the unique compositor identifier from the most downstream compositor. Each of the upstream compositors appends its unique compositor identifier to the unique compositor identifier received from the most downstream compositor to produce a “compositor tree compositor identifier”. The compositor tree compositor identifier identifies both the compositor and its position in the compositor tree. This enables an application to detect the structure of the compositor tree so that the application can determine a desired tiling configuration that exploits the structure of the compositor tree.Type: GrantFiled: May 5, 2003Date of Patent: April 25, 2006Assignee: Silicon Graphics, Inc.Inventors: Greg Sadowski, Eric Kunze
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Publication number: 20040222994Abstract: Compositors are identified in a manner that defines the position of the compositor in the compositor tree. Each compositor has its own “unique compositor identifier”. Starting at the most downstream compositor, it transmits its unique compositor identifier to all upstream compositors directly coupled to it. The upstream compositors receive the unique compositor identifier from the most downstream compositor. Each of the upstream compositors appends its unique compositor identifier to the unique compositor identifier received from the most downstream compositor to produce a “compositor tree compositor identifier”. The compositor tree compositor identifier identifies both the compositor and its position in the compositor tree. This enables an application to detect the structure of the compositor tree so that the application can determine a desired tiling configuration that exploits the structure of the compositor tree.Type: ApplicationFiled: May 5, 2003Publication date: November 11, 2004Applicant: Silicon Graphics, Inc.Inventors: Greg Sadowski, Eric Kunze