Patents by Inventor Eric L. Bogatin

Eric L. Bogatin has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 7498826
    Abstract: A probe array wafer includes a substrate upon which a plurality of compliant probes are mounted. Pairs of axially aligned probes may be electrically connected together to provide a pass through power connection from the test equipment to the device under test. Likewise, pairs of axially aligned probes may be electrically connected together to provide a ground connection from the test equipment to the device under test.
    Type: Grant
    Filed: August 25, 2006
    Date of Patent: March 3, 2009
    Assignee: Interconnect Devices, Inc.
    Inventors: Eric L. Bogatin, David W. Henry, Donald A. Marx
  • Publication number: 20080068034
    Abstract: A probe array wafer includes a substrate upon which a plurality of compliant probes are mounted. Pairs of axially aligned probes may be electrically connected together to provide a pass through power connection from the test equipment to the device under test. Likewise, pairs of axially aligned probes may be electrically connected together to provide a ground connection from the test equipment to the device under test.
    Type: Application
    Filed: August 25, 2006
    Publication date: March 20, 2008
    Inventors: Eric L. Bogatin, David W. Henry, Donald A. Marx
  • Patent number: 7049670
    Abstract: An array apparatus has a micromachined SOI structure, such as a MEMS array, mounted directly on a class of insulative substrate, such as low temperature co-fired ceramic or a thermal-coefficient of expansion matched glass, in which is embedded electrostatic electrodes disposed in alignment with the individual MEMS elements, where the electrostatic electrodes are configured for substantial fanout. In a specific embodiment in order to compensate for differences in thermal-expansion characteristics between SOI and ceramic, a flexible mounting is effected by means of posts, bridges and/or mechanical elements which allow uneven expansion in x and y while maintaining z-axis stability. Methods according to the invention include fabrication steps wherein electrodes are fabricated to a post-fired ceramic substrate and coupled via traces through the ceramic substrate to driver modules.
    Type: Grant
    Filed: July 30, 2001
    Date of Patent: May 23, 2006
    Assignee: Glimmerglass Networks, Inc.
    Inventors: Bryan P. Staker, Douglas L. Teeter, Eric L. Bogatin
  • Patent number: 6764881
    Abstract: An array apparatus has a micromachined SOI structure, such as a MEMS array, mounted directly on a class of insulative substrate, such as low temperature co-fired ceramic or a thermal-coefficient of expansion matched glass, in which is embedded electrostatic electrodes disposed in alignment with the individual MEMS elements, where the electrostatic electrodes are configured for substantial fanout. In a specific embodiment in order to compensate for differences in thermal-expansion characteristics between SOI and ceramic, a flexible mounting is effected by means of posts, bridges and/or mechanical elements which allow uneven expansion in x and y while maintaining z-axis stability. Methods according to the invention include fabrication steps wherein electrodes are fabricated to a post-fired ceramic substrate and coupled via traces through the ceramic substrate to driver modules.
    Type: Grant
    Filed: July 12, 2002
    Date of Patent: July 20, 2004
    Assignee: Glimmerglass Networks, Inc.
    Inventors: Bryan P. Staker, Douglas L. Teeter, Jr., Eric L. Bogatin
  • Publication number: 20030022423
    Abstract: An array apparatus has a micromachined SOI structure, such as a MEMS array, mounted directly on a class of insulative substrate, such as low temperature co-fired ceramic or a thermal-coefficient of expansion matched glass, in which is embedded electrostatic electrodes disposed in alignment with the individual MEMS elements, where the electrostatic electrodes are configured for substantial fanout. In a specific embodiment in order to compensate for differences in thermal-expansion characteristics between SOI and ceramic, a flexible mounting is effected by means of posts, bridges and/or mechanical elements which allow uneven expansion in x and y while maintaining z-axis stability. Methods according to the invention include fabrication steps wherein electrodes are fabricated to a post-fired ceramic substrate and coupled via traces through the ceramic substrate to driver modules.
    Type: Application
    Filed: July 30, 2001
    Publication date: January 30, 2003
    Inventors: Bryan P. Staker, Douglas L. Teeter, Eric L. Bogatin
  • Publication number: 20030022424
    Abstract: An array apparatus has a micromachined SOI structure, such as a MEMS array, mounted directly on a class of insulative substrate, such as low temperature co-fired ceramic or a thermal-coefficient of expansion matched glass, in which is embedded electrostatic electrodes disposed in alignment with the individual MEMS elements, where the electrostatic electrodes are configured for substantial fanout. In a specific embodiment in order to compensate for differences in thermal-expansion characteristics between SOI and ceramic, a flexible mounting is effected by means of posts, bridges and/or mechanical elements which allow uneven expansion in x and y while maintaining z-axis stability. Methods according to the invention include fabrication steps wherein electrodes are fabricated to a post-fired ceramic substrate and coupled via traces through the ceramic substrate to driver modules.
    Type: Application
    Filed: July 12, 2002
    Publication date: January 30, 2003
    Applicant: GLIMMERGLASS NETWORKS, INC.
    Inventors: Bryan P. Staker, Douglas L. Teeter, Eric L. Bogatin
  • Patent number: 5528083
    Abstract: An integrated circuit chip and flat capacitor assembly are connected with short bonding wires to reduce electrical noise. A flat chip capacitor is coupled to the chip and includes a first electrode, a second electrode and a dielectric layer disposed between the electrodes. The ground and power bonding pads of an integrated circuit chip are coupled to a number of terminals arranged in a row near the outer edge of the capacitor, where each of the terminals is coupled to one of the electrodes. The terminals of the capacitor are connected to a number of package leads of a lead frame or a other integrated circuit package. The invention includes embodiments in which the chip is placed on top of the capacitor, the capacitor is placed on top of the chip, and a flex circuit of a micro ball grid array is placed on a capacitor which is positioned on a chip.
    Type: Grant
    Filed: October 4, 1994
    Date of Patent: June 18, 1996
    Assignee: Sun Microsystems, Inc.
    Inventors: Deviprasad Malladi, Eric L. Bogatin, Bahram Zand
  • Patent number: 4816811
    Abstract: A resilient and deformable touch screen that is adapted to be overlaid on the surface of a CRT screen is formed from a semi-rigid plastic frame attached to a flexible plastic pouch filled with a soft resilient material which adheres to the surface of the pouch.
    Type: Grant
    Filed: March 15, 1985
    Date of Patent: March 28, 1989
    Assignees: American Telephone and Telegraph Company, AT&T Technologies, Inc., AT&T Information Systems Inc., AT&T Bell Laboratories
    Inventors: Eric L. Bogatin, Xina S. Quan, Thomas A. Schwartz, Wesley P. Townsend