Patents by Inventor Eric L. Newman

Eric L. Newman has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 5598303
    Abstract: A synchronization technique is described which finds use in a disk array subsystem comprising a plurality of disk storage devices connected to a controller. In response to signals from each of the devices specifying their angular position at a particular time, the controller calculates the relative angular positions of the devices and issues a signal to each of the devices specifying the amount and direction of change in rotational velocity required to achieve synchronization. In a two device subsystem, the signal to one device will specify a speed decrease and the signal to the second device will specify a speed increase.
    Type: Grant
    Filed: March 6, 1996
    Date of Patent: January 28, 1997
    Assignee: International Business Machines Corporation
    Inventors: J. Wyn Jones, Stephen P. Legg, Eric L. Newman
  • Patent number: 4740720
    Abstract: An I.sup.2 L output circuit is described for supplying current (I.sub.D ') to an output node (8) of a plurality of I.sup.2 L blocks (7) in order to ascertain the logic condition at the output node. The output circuit includes a standard I.sup.2 L gate (11) with an input connection (12) to the semiconductor region comprising both the lateral injector transistor collector electrode and the vertical switching transistor base electrode, and an output connection (13) from the semiconductor region comprising one of the collectors electrodes of the switching transistor. The gate output being used to control two identical current sources (T.sub.11, T.sub.12) one of which (T.sub.11) supplies current to the input of a simple current mirror (T.sub.13, T.sub.14) having its output connected to the gate input. The other current source (T.sub.12) being connected to the output node of the logic blocks. The provision of a current feedback loop around the I.sup.
    Type: Grant
    Filed: April 20, 1987
    Date of Patent: April 26, 1988
    Assignee: International Business Machines Corporation
    Inventor: Eric L. Newman
  • Patent number: 4227175
    Abstract: Data recognition apparatus includes a temporary storage to hold three data bits, a readable storage to store eight different sequences which are expected to occur, and a comparison means to find the closest match of the contents of the temporary storage with the readable storage at each bit time. Error detection and error correction are realized as each bit is recognized three times sequentially. The apparatus may use surface acoustic wave and charge coupled device filter banks, and analog to digital conversion plus data processor comparison.
    Type: Grant
    Filed: January 15, 1979
    Date of Patent: October 7, 1980
    Assignee: International Business Machines Corporation
    Inventor: Eric L. Newman