Patents by Inventor Eric L. Ryherd

Eric L. Ryherd has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 4970499
    Abstract: Disclosed is a three-dimensional display system that utilizes a host processor for performing geometric transformations and a local display processor for processing the user-supplied information which defines the object to be displayed. The display processor creates image data defining the location, color and intensity of each point of the overall image. This display processor processes and stores depth data which defines the corresponding depth relationships of the image points at each location of the overall image with the depth data being stored in a depth buffer, which is part of the display processor. The depth buffer is a two port memory device with one port being a random access port and the other being a serial access port. The display processor pieplines depth buffering operations by loading a row of data from the depth buffer into a shift register and then reading (a Read operation) the relevant pixel data through the serial access port which is connected to the shift register.
    Type: Grant
    Filed: July 21, 1988
    Date of Patent: November 13, 1990
    Assignee: Raster Technologies, Inc.
    Inventors: Eric L. Ryherd, Ross G. Werner, John G. Torborg, Jr.
  • Patent number: 4967392
    Abstract: The invention is a method and apparatus primarily for generating pixel representations for the video display of three-dimensional objects projected onto a two-dimensional pixel plane. The scanlines of the pixel plane are associated into N interlaced sets, each set having as members only scanlines having an equivalent vertical pixel location Modulo N. The image memory unit block utilizes both serial and parallel processing. For each color (red, green and blue) and for calculating depths, each image memory unit has a plurality N of Scanline Processors for generating the color or depth data to assign to a given pixel. Each of the Scanline Processors is associated with exactly one of the N sets of scanlines. The image memory units each also include a Master Controller. For certain objects, particularly triangular patches, the Master Controller sets up sequentially each Scanline Processor to render pixels on a specific scanline.
    Type: Grant
    Filed: July 27, 1988
    Date of Patent: October 30, 1990
    Assignee: Alliant Computer Systems Corporation
    Inventors: Ross G. Werner, Eric L. Ryherd