Patents by Inventor Eric Lais

Eric Lais has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 7440523
    Abstract: An apparatus and method are described for mapping a plurality of multimedia streams (e.g., received from a set of satellite transponders) across a lesser plurality of decoders. In one embodiment, arbitration logic allocates the multimedia streams to divide the decoding load equally among the group of decoders (or at least as equally as possible). Allocation may occur statically, when the system is initialized, or dynamically, as the streams are being processed. In addition, in one embodiment, the arbitration logic monitors the amount of multimedia data for each stream stored in a buffer and causes streams to be serviced by the decoders which have relatively more stored multimedia data.
    Type: Grant
    Filed: April 24, 2006
    Date of Patent: October 21, 2008
    Assignee: Digeo, Inc.
    Inventors: Eric Lais, Mark Greenberg, Manish Shah
  • Publication number: 20060262885
    Abstract: An apparatus and method are described for mapping a plurality of multimedia streams (e.g., received from a set of satellite transponders) across a lesser plurality of decoders. In one embodiment, arbitration logic allocates the multimedia streams to divide the decoding load equally among the group of decoders (or at least as equally as possible). Allocation may occur statically, when the system is initialized, or dynamically, as the streams are being processed. In addition, in one embodiment, the arbitration logic monitors the amount of multimedia data for each stream stored in a buffer and causes streams to be serviced by the decoders which have relatively more stored multimedia data.
    Type: Application
    Filed: April 24, 2006
    Publication date: November 23, 2006
    Inventors: Eric Lais, Mark Greenberg, Manish Shah
  • Publication number: 20060129739
    Abstract: A memory controller includes ports and corresponding tables. Each port is receptive to one or more memory modules. Each table includes entries mapping memory addresses to the memory modules. Each entry corresponds to no more than one of the memory modules. The tables support asymmetric population of the memory modules within the ports; each port is capable of having a different number of memory modules relative to the other ports. The tables impose no restrictions on where the memory modules are to be inserted within the ports, both number-wise and position-wise. The tables are independently configurable; the configuration of each table is modifiable independently of the configurations of the other tables. Each table is dynamically configurable. The entries of a table are modifiable to reflect changes in the number and type of the memory modules connected, without restarting or temporarily halting the computer system containing the memory controller.
    Type: Application
    Filed: December 11, 2004
    Publication date: June 15, 2006
    Inventors: Eric Lais, Donald DeSota, Michael Grassi, Bruce Gilbert
  • Publication number: 20060101209
    Abstract: A system, method and article of manufacture for reducing latencies associated with cache coherence directory misses on external caches in a shared distributed memory data processing system. A cache coherence directory is evaluated for possible prefetching of a directory entry into a directory cache. A prefetch miss indicator is set if the prefetch evaluated results in a directory miss. The prefetch miss indicator is consulted during subsequent processing of a memory block request corresponding to the directory entry. An accelerated snoop response action is taken if the prefetch miss indicator is set. The latency of a second lookup into the cache coherence directory, which would otherwise be required, is thereby avoided.
    Type: Application
    Filed: November 8, 2004
    Publication date: May 11, 2006
    Inventors: Eric Lais, Donald DeSota, Rob Joersz
  • Patent number: 7035355
    Abstract: An apparatus and method are described for mapping a plurality of multimedia streams (e.g., received from a set of satellite transponders) across a lesser plurality of decoders. In one embodiment, arbitration logic allocates the multimedia streams to divide the decoding load equally among the group of decoders (or at least as equally as possible). Allocation may occur statically, when the system is initialized, or dynamically, as the streams are being processed. In addition, in one embodiment, the arbitration logic monitors the amount of multimedia data for each stream stored in a buffer and causes streams to be serviced by the decoders which have relatively more stored multimedia data.
    Type: Grant
    Filed: October 4, 2001
    Date of Patent: April 25, 2006
    Assignee: Digeo, Inc.
    Inventors: Eric Lais, Mark Greenberg, Manish Shah
  • Publication number: 20030133514
    Abstract: An apparatus and method are described for mapping a plurality of multimedia streams (e.g., received from a set of satellite transponders) across a lesser plurality of decoders. In one embodiment, arbitration logic allocates the multimedia streams to divide the decoding load equally among the group of decoders (or at least as equally as possible). Allocation may occur statically, when the system is initialized, or dynamically, as the streams are being processed. In addition, in one embodiment, the arbitration logic monitors the amount of multimedia data for each stream stored in a buffer and causes streams to be serviced by the decoders which have relatively more stored multimedia data.
    Type: Application
    Filed: October 4, 2001
    Publication date: July 17, 2003
    Inventors: Eric Lais, Mark Greenberg, Manish Shah