Patents by Inventor Eric Lu

Eric Lu has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 11951509
    Abstract: An applicator head for a vacuum coating system includes a manifold shell having opposing shell plates, each including a conduit attachment coupled to a shell aperture. An applicator manifold is affixed to each shell plate. Each applicator manifold includes two coupled manifold plates, with one including a manifold aperture, and each is affixed to the respective shell plate so that each manifold aperture aligns with the respective shell aperture. An applicator channel is formed between the manifold plates of each applicator manifold, and the applicator channel is fluidically coupled to the manifold aperture of each respective applicator manifold. Each applicator channel forms an applicator port at a leading edge of each respective applicator manifold, and each leading edge is configured to be complementary in shape to an edge of a workpiece to be coated. First and second face plates are disposed over the leading edges of the applicator manifolds.
    Type: Grant
    Filed: August 26, 2022
    Date of Patent: April 9, 2024
    Assignee: AWI Licensing LLC
    Inventors: Sebastien G. Nalin, Scott L. Huntzinger, John J. Hartman, Jr., Lida Lu, Eric D. Kragness
  • Publication number: 20240084076
    Abstract: A polyfunctional organohydrogensiloxane is prepared using a boron containing Lewis acid as catalyst. The polyfunctional organohydrogensiloxane may be formulated into release coating compositions. Alternatively, the polyfunctional organohydrogensiloxane may be further functionalized with a curable group to form a clustered functional organosiloxane. The clustered functional organosiloxane may be formulated into thermal radical cure adhesive compositions.
    Type: Application
    Filed: September 5, 2023
    Publication date: March 14, 2024
    Inventors: Eric Joffre, Nanguo Liu, Gang Lu, Zhenbin Niu, David Rich
  • Publication number: 20240075653
    Abstract: A saw assembly including a base, a frame assembly disposed on the base and a rail system disposed on the frame assembly. The rail system extends in a longitudinal direction and a table assembly is slidingly disposed in the longitudinal direction on the rail system. The assembly includes a split table having a first table portion and a second table portion separated by a gap extending parallel to the longitudinal direction of the rail system. A pair of fences are mounted to the first and second table portions and bridge the gap to connect the first and second table portions to each other. The gap and corresponding channels and drain apertures allow the tile saw to channel and retain water while cutting a tile. At least one of the fences has a projection in the form of a bridge that is pivotable about the fence to move the projection away from the path of the blade.
    Type: Application
    Filed: November 9, 2023
    Publication date: March 7, 2024
    Inventors: Peter Chaikowsky, Robinson Lu, Chunlin Wu, Eric Tang, Marcus Rompel
  • Patent number: 11923290
    Abstract: Embodiments disclosed herein include semiconductor devices with source/drain interconnects that include a barrier layer. In an embodiment the semiconductor device comprises a source region and a drain region. In an embodiment, a semiconductor channel is between the source region and the drain region, and a gate electrode is over the semiconductor channel. In an embodiment, the semiconductor device further comprises interconnects to the source region and the drain region. In an embodiment, the interconnects comprise a barrier layer, a metal layer, and a fill metal.
    Type: Grant
    Filed: June 26, 2020
    Date of Patent: March 5, 2024
    Assignee: Intel Corporation
    Inventors: Siddharth Chouksey, Gilbert Dewey, Nazila Haratipour, Mengcheng Lu, Jitendra Kumar Jha, Jack T. Kavalieros, Matthew V. Metz, Scott B Clendenning, Eric Charles Mattson
  • Patent number: 11923497
    Abstract: Described herein, are battery separators, comprising the following: a microporous polymeric film; and an optional coating layer on at least one side of the microporous polymeric film, wherein at least one of the microporous polymeric film and the optional coating comprises an additive. The additive is selected from the group consisting of a lubricating agent, a plasticizing agent, a nucleating agent, a shrinkage reducing agent, a surfactant, an SEI improving agent, a cathode protection agent, a flame retardant additive, LiPF6 salt stabilizer, an overcharge protector, an aluminum corrosion inhibitor, a lithium deposition agent or improver, or a solvation enhancer, an aluminum corrosion inhibitor, a wetting agent, and a viscosity improver. Also, described herein are batteries, including lithium-ion batteries, comprising one or more of the described separators. Methods for making the battery separators are also described.
    Type: Grant
    Filed: November 1, 2021
    Date of Patent: March 5, 2024
    Assignee: Celgard, LLC
    Inventors: Changqing Wang Adams, Kang Karen Xiao, Stefan Reinartz, Masaaki Okada, Brian R. Stepp, Yao Lu, Eric Robert White, Katharine Chemelewski
  • Publication number: 20240065619
    Abstract: Example inventions detect and treat an occurrence of an apnea event during a sleep period of a user. Example inventions receive data corresponding to nasal air pressure of the user and/or audio of the user during the sleep period. Example inventions determine patterns in the data, based on the patterns, detect the apnea event and, in response to the detecting, treat the apnea event.
    Type: Application
    Filed: August 23, 2023
    Publication date: February 29, 2024
    Inventors: Hoo-min D. TOONG, Terry SPURLING, Anthony WEI, William C. ALTMANN, Vivian CHENG, Eric CHENG, Fenghua LU, Tiejun ZHANG
  • Patent number: 10165838
    Abstract: Some embodiments include a protective cover for a mobile display device including a housing, a backplane, a liner, and a lip. The housing includes an outer portion and an inner portion, where the outer portion of the housing has a rectangular frame structure to provide a protective shell along an outer edge of the mobile display device, and where the inner portion receives and secures the mobile display device. The backplane is comprised of a rigid material and is coupled to a backside of the housing and provides a protective shell along a back side of the mobile display device. The liner has a corrugated soft rubber or polymer construction including a successive pattern of protrusions separated by a distance and is coupled to the inner portion of the housing. The lip is coupled to a front side of the housing to retain the mobile display device within the housing.
    Type: Grant
    Filed: June 19, 2015
    Date of Patent: January 1, 2019
    Assignee: Logitech Europe S.A.
    Inventors: Fergal Corcoran, Padraig Murphy, Ken Delaney, Nick Jinkinson, Eric Lu, Stephen Harvey, Jerry Ahern, Pierce Brady, Kevin Hughes, Ommkar Gulavani, Rade Vignjevic
  • Patent number: 9502242
    Abstract: Embodiments of the present disclosure generally provide a method and apparatus for forming an IGZO active layer within a thin film transistor (TFT) device. In one embodiment, a method is provided for forming an IGZO active layer on a dielectric surface using a PECVD deposition process. In one embodiment, a method is provided for pretreating and passivating the dielectric surface for receiving the PECVD formed IGZO layer. In another embodiment, a method is provided for treating a PECVD formed IGZO layer after depositing said layer. In another embodiment, a method is provided for forming a multi-layer or complex layering structure of IGZO, within a PECVD processing chamber, for optimizing TFT electrical characteristics such as carrier density, contact resistance, and gate dielectric interfacial properties. In yet another embodiment, a method is provided for forming integrated layers for a TFT including IGZO within an in-situ environment of a cluster tool.
    Type: Grant
    Filed: January 19, 2015
    Date of Patent: November 22, 2016
    Assignee: APPLIED MATERIALS, INC.
    Inventors: Tae Kyung Won, John M. White, Soo Young Choi, Jung-Chi (Eric) Lu
  • Publication number: 20160192751
    Abstract: Some embodiments include a protective cover for a mobile display device including a housing, a backplane, a liner, and a lip. The housing includes an outer portion and an inner portion, where the outer portion of the housing has a rectangular frame structure to provide a protective shell along an outer edge of the mobile display device, and where the inner portion receives and secures the mobile display device. The backplane is comprised of a rigid material and is coupled to a backside of the housing and provides a protective shell along a back side of the mobile display device. The liner has a corrugated soft rubber or polymer construction including a successive pattern of protrusions separated by a distance and is coupled to the inner portion of the housing. The lip is coupled to a front side of the housing to retain the mobile display device within the housing.
    Type: Application
    Filed: June 19, 2015
    Publication date: July 7, 2016
    Inventors: Fergal Corcoran, Padraig Murphy, Ken Delaney, Nick Jinkinson, Eric Lu, Stephen Harvey, Jerry Ahern, Pierce Brady, Kevin Hughes, Ommkar Gulavani, Rade Vignjevic
  • Publication number: 20150221507
    Abstract: Embodiments of the present disclosure generally provide a method and apparatus for forming an IGZO active layer within a thin film transistor (TFT) device. In one embodiment, a method is provided for forming an IGZO active layer on a dielectric surface using a PECVD deposition process. In one embodiment, a method is provided for pretreating and passivating the dielectric surface for receiving the PECVD formed IGZO layer. In another embodiment, a method is provided for treating a PECVD formed IGZO layer after depositing said layer. In another embodiment, a method is provided for forming a multi-layer or complex layering structure of IGZO, within a PECVD processing chamber, for optimizing TFT electrical characteristics such as carrier density, contact resistance, and gate dielectric interfacial properties. In yet another embodiment, a method is provided for forming integrated layers for a TFT including IGZO within an in-situ environment of a cluster tool.
    Type: Application
    Filed: January 19, 2015
    Publication date: August 6, 2015
    Inventors: Tae Kyung WON, John M. WHITE, Soo Young CHOI, Jung-Chi (Eric) LU
  • Patent number: D696667
    Type: Grant
    Filed: October 9, 2012
    Date of Patent: December 31, 2013
    Assignee: Logitech Europe S.A.
    Inventors: Marten Helwig, Jean-Christophe Hemes, Darragh Luttrell, Chia Feng Lee, Eric Lu, Robert Ku, Eric Hsu, Kai Chang
  • Patent number: D753124
    Type: Grant
    Filed: November 17, 2014
    Date of Patent: April 5, 2016
    Assignee: Logitech Europe S.A.
    Inventors: Fergal Corcoran, Padraig Murphy, Ken Delaney, Nick Jinkinson, Marcel Twohig, Ian Walton, Eric Lu