Patents by Inventor Eric M. Solie

Eric M. Solie has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 11621574
    Abstract: An apparatus including a proportional gain circuit, an integral gain circuit, a limit circuit, a gain booster circuit and a combiner. The gain circuits apply a proportional gain and an integral gain to an error signal, and the combiner combines both gained error signals to provide a control signal. The limit circuit applies a limit function that limits the proportional gain to a magnitude. The gain booster circuit increases gain while the limit function is being applied. The increased gain may be applied to only the integral gain, or to both the integral and proportional gains such as by boosting gain of the error signal. The apparatus may be a regulator that may include multiple control loops providing multiple error signals, in which a mode selector selects one of the error signals to control regulation. The limit function increases stability while the boosted gain improves transient response during mode transitions.
    Type: Grant
    Filed: April 27, 2020
    Date of Patent: April 4, 2023
    Assignee: Intersil Americas LLC
    Inventors: M. Jason Houston, Eric M. Solie, Mehul D. Shah
  • Patent number: 10804801
    Abstract: A hysteretic current mode buck-boost voltage regulator including a buck-boost voltage converter, a switching controller, a window circuit, a ramp circuit, and a timing circuit. The timing circuit may be additional ramp circuits. The voltage converter is toggled between first and second switching states during a boost mode, is toggled between third and fourth switching states during a buck mode, and is sequentially cycled through each switching state during a buck-boost mode. The ramp circuit develops a ramp voltage that simulates current through the voltage converter, and switching is determined using the ramp voltage compared with window voltages provided by the window circuit. The window voltages establish frequency, and may be adjusted based on the input and output voltages. The timing circuit provides timing indications during the buck-boost mode to ensure that the second and fourth switching states have approximately the same duration to provide symmetry of the ramp signal.
    Type: Grant
    Filed: March 30, 2017
    Date of Patent: October 13, 2020
    Assignee: Intersil Americas LLC
    Inventors: M. Jason Houston, Eric M. Solie
  • Publication number: 20200259352
    Abstract: An apparatus including a proportional gain circuit, an integral gain circuit, a limit circuit, a gain booster circuit and a combiner. The gain circuits apply a proportional gain and an integral gain to an error signal, and the combiner combines both gained error signals to provide a control signal. The limit circuit applies a limit function that limits the proportional gain to a magnitude. The gain booster circuit increases gain while the limit function is being applied. The increased gain may be applied to only the integral gain, or to both the integral and proportional gains such as by boosting gain of the error signal. The apparatus may be a regulator that may include multiple control loops providing multiple error signals, in which a mode selector selects one of the error signals to control regulation. The limit function increases stability while the boosted gain improves transient response during mode transitions.
    Type: Application
    Filed: April 27, 2020
    Publication date: August 13, 2020
    Applicant: Intersil Americas LLC
    Inventors: M. Jason HOUSTON, Eric M. SOLIE, Mehul D. SHAH
  • Patent number: 10637266
    Abstract: An apparatus including a proportional gain circuit, an integral gain circuit, a limit circuit, a gain booster circuit and a combiner. The gain circuits apply a proportional gain and an integral gain to an error signal, and the combiner combines both gained error signals to provide a control signal. The limit circuit applies a limit function that limits the proportional gain to a magnitude. The gain booster circuit increases gain while the limit function is being applied. The increased gain may be applied to only the integral gain, or to both the integral and proportional gains such as by boosting gain of the error signal. The apparatus may be a regulator that may include multiple control loops providing multiple error signals, in which a mode selector selects one of the error signals to control regulation. The limit function increases stability while the boosted gain improves transient response during mode transitions.
    Type: Grant
    Filed: March 7, 2016
    Date of Patent: April 28, 2020
    Assignee: Intersil Americas LLC
    Inventors: M. Jason Houston, Eric M. Solie, Mehul D. Shah
  • Publication number: 20180337603
    Abstract: A voltage regulator includes a converter and a modulator. The converter includes a switching circuit coupled to an inductor for converting an input voltage to an output voltage. The modulator controls the switching circuit in a buck mode of operation, a boost mode of operation, and an intermediate buck-boost mode of operation. During the buck-boost mode of operation, the modulator controls the switching circuit during each switching cycle to sequentially switch between three different switching states, including a first switching state that applies the input voltage across the inductor, a second switching state that applies a difference between the input and output voltages across the inductor, and a third switching state that applies the output voltage across the inductor. The modulator is controlled based on voltage applied across or current flowing through the inductor to regulate the output voltage to a target level.
    Type: Application
    Filed: July 30, 2018
    Publication date: November 22, 2018
    Inventors: M. Jason HOUSTON, Eric M. SOLIE
  • Patent number: 10038382
    Abstract: A voltage regulator including a converter and a modulator. The converter includes a switching circuit coupled to an inductor for converting an input voltage to an output voltage. The modulator controls the switching circuit in a buck mode of operation, a boost mode of operation, and an intermediate buck-boost mode of operation. During the buck-boost mode of operation, the modulator controls the switching circuit during each switching cycle to sequentially switch between three different switching states, including a first switching state that applies the input voltage across the inductor, a second switching state that applies a difference between the input and output voltages across the inductor, and a third switching state that applies the output voltage across the inductor. The modulator is controlled based on voltage applied across or current flowing through the inductor to regulate the output voltage to a target level.
    Type: Grant
    Filed: January 9, 2017
    Date of Patent: July 31, 2018
    Assignee: Intersil Americas LLC
    Inventors: M. Jason Houston, Eric M. Solie
  • Patent number: 9871446
    Abstract: A current mode control regulator including a control circuit and a current generator. The control circuit regulates an output voltage based on a reference voltage using current mode control. The current generator applies an adjust current to a feedback current signal, in which the adjust current is proportional to a difference between a voltage indicative of the output voltage and the reference voltage to emulate an AC load resistance at an output of the current mode regulator. A load resistor emulator emulates an AC load resistor to increase the phase margin of current mode control regulator when operating without a battery coupled to the output, such as when the battery is physically removed or otherwise electrically disconnected. Operation is not substantially changed when the battery is connected, so that the desired phase margin is achieve with or without the battery.
    Type: Grant
    Filed: March 7, 2016
    Date of Patent: January 16, 2018
    Assignee: INTERSIL AMERICAS LLC
    Inventors: M. Jason Houston, Eric M. Solie
  • Publication number: 20170207704
    Abstract: A hysteretic current mode buck-boost voltage regulator including a buck-boost voltage converter, a switching controller, a window circuit, a ramp circuit, and a timing circuit. The timing circuit may be additional ramp circuits. The voltage converter is toggled between first and second switching states during a boost mode, is toggled between third and fourth switching states during a buck mode, and is sequentially cycled through each switching state during a buck-boost mode. The ramp circuit develops a ramp voltage that simulates current through the voltage converter, and switching is determined using the ramp voltage compared with window voltages provided by the window circuit. The window voltages establish frequency, and may be adjusted based on the input and output voltages. The timing circuit provides timing indications during the buck-boost mode to ensure that the second and fourth switching states have approximately the same duration to provide symmetry of the ramp signal.
    Type: Application
    Filed: March 30, 2017
    Publication date: July 20, 2017
    Applicant: Intersil Americas LLC
    Inventors: M. Jason HOUSTON, Eric M. SOLIE
  • Publication number: 20170207703
    Abstract: A voltage regulator including a converter and a modulator. The converter includes a switching circuit coupled to an inductor for converting an input voltage to an output voltage. The modulator controls the switching circuit in a buck mode of operation, a boost mode of operation, and an intermediate buck-boost mode of operation. During the buck-boost mode of operation, the modulator controls the switching circuit during each switching cycle to sequentially switch between three different switching states, including a first switching state that applies the input voltage across the inductor, a second switching state that applies a difference between the input and output voltages across the inductor, and a third switching state that applies the output voltage across the inductor. The modulator is controlled based on voltage applied across or current flowing through the inductor to regulate the output voltage to a target level.
    Type: Application
    Filed: January 9, 2017
    Publication date: July 20, 2017
    Inventors: M. Jason HOUSTON, Eric M. SOLIE
  • Patent number: 9614380
    Abstract: A hysteretic current mode buck-boost voltage regulator including a buck-boost voltage converter, a switching controller, a window circuit, a ramp circuit, and a timing circuit. The timing circuit may be additional ramp circuits. The voltage converter is toggled between first and second switching states during a boost mode, is toggled between third and fourth switching states during a buck mode, and is sequentially cycled through each switching state during a buck-boost mode. The ramp circuit develops a ramp voltage that simulates current through the voltage converter, and switching is determined using the ramp voltage compared with window voltages provided by the window circuit. The window voltages establish frequency, and may be adjusted based on the input and output voltages. The timing circuit provides timing indications during the buck-boost mode to ensure that the second and fourth switching states have approximately the same duration to provide symmetry of the ramp signal.
    Type: Grant
    Filed: October 1, 2015
    Date of Patent: April 4, 2017
    Assignee: INTERSIL AMERICAS LLC
    Inventors: M. Jason Houston, Eric M. Solie
  • Publication number: 20160352227
    Abstract: A current mode control regulator including a control circuit and a current generator. The control circuit regulates an output voltage based on a reference voltage using current mode control. The current generator applies an adjust current to a feedback current signal, in which the adjust current is proportional to a difference between a voltage indicative of the output voltage and the reference voltage to emulate an AC load resistance at an output of the current mode regulator. A load resistor emulator emulates an AC load resistor to increase the phase margin of current mode control regulator when operating without a battery coupled to the output, such as when the battery is physically removed or otherwise electrically disconnected. Operation is not substantially changed when the battery is connected, so that the desired phase margin is achieve with or without the battery.
    Type: Application
    Filed: March 7, 2016
    Publication date: December 1, 2016
    Inventors: M. JASON HOUSTON, ERIC M. SOLIE
  • Publication number: 20160352128
    Abstract: An apparatus including a proportional gain circuit, an integral gain circuit, a limit circuit, a gain booster circuit and a combiner. The gain circuits apply a proportional gain and an integral gain to an error signal, and the combiner combines both gained error signals to provide a control signal. The limit circuit applies a limit function that limits the proportional gain to a magnitude. The gain booster circuit increases gain while the limit function is being applied. The increased gain may be applied to only the integral gain, or to both the integral and proportional gains such as by boosting gain of the error signal. The apparatus may be a regulator that may include multiple control loops providing multiple error signals, in which a mode selector selects one of the error signals to control regulation. The limit function increases stability while the boosted gain improves transient response during mode transitions.
    Type: Application
    Filed: March 7, 2016
    Publication date: December 1, 2016
    Inventors: M. JASON HOUSTON, ERIC M. SOLIE, MEHUL D. SHAH
  • Publication number: 20160105110
    Abstract: A hysteretic current mode buck-boost voltage regulator including a buck-boost voltage converter, a switching controller, a window circuit, a ramp circuit, and a timing circuit. The timing circuit may be additional ramp circuits. The voltage converter is toggled between first and second switching states during a boost mode, is toggled between third and fourth switching states during a buck mode, and is sequentially cycled through each switching state during a buck-boost mode. The ramp circuit develops a ramp voltage that simulates current through the voltage converter, and switching is determined using the ramp voltage compared with window voltages provided by the window circuit. The window voltages establish frequency, and may be adjusted based on the input and output voltages. The timing circuit provides timing indications during the buck-boost mode to ensure that the second and fourth switching states have approximately the same duration to provide symmetry of the ramp signal.
    Type: Application
    Filed: October 1, 2015
    Publication date: April 14, 2016
    Inventors: M. JASON HOUSTON, ERIC M. SOLIE
  • Patent number: 9246348
    Abstract: A system and method for controlling a converter of a power stage receiving an adapter current for providing current to a load. The converter is operative in a buck mode for charging a battery and in a boost mode for discharging the battery to the load to supplement adapter current. The adapter current is compared with a predetermined level to develop a control signal, and at least one pulse control signal is developed based on the control signal and used to control the modulator. The modulator operates the converter in the buck mode when the adapter current up to the predetermined level, and operates the converter in the boost mode when the adapter current exceeds the predetermined level. The battery current may also be monitored to adjust the control signal to limit battery charge or discharge current in both modes.
    Type: Grant
    Filed: May 24, 2012
    Date of Patent: January 26, 2016
    Assignee: INTERSIL AMERICAS LLC.
    Inventor: Eric M. Solie
  • Publication number: 20130088203
    Abstract: A system and method for controlling a converter of a power stage receiving an adapter current for providing current to a load. The converter is operative in a buck mode for charging a battery and in a boost mode for discharging the battery to the load to supplement adapter current. The adapter current is compared with a predetermined level to develop a control signal, and at least one pulse control signal is developed based on the control signal and used to control the modulator. The modulator operates the converter in the buck mode when the adapter current up to the predetermined level, and operates the converter in the boost mode when the adapter current exceeds the predetermined level. The battery current may also be monitored to adjust the control signal to limit battery charge or discharge current in both modes.
    Type: Application
    Filed: May 24, 2012
    Publication date: April 11, 2013
    Applicant: INTERSIL AMERICAS LLC
    Inventor: Eric M. Solie
  • Publication number: 20090033293
    Abstract: A voltage converter including a capacitive voltage divider combined with a buck converter and battery charger. The converter includes four capacitors, a switch circuit, an inductor and a controller. The capacitors form a capacitor loop between an input node and a reference node and include a fly capacitor controlled by the switch circuit, which is controlled by a PWM signal to half the input voltage to provide a first output voltage on a first output node, and to convert the first output voltage to the second output voltage via the inductor. The controller controls the PWM signal to regulate the second output voltage, and provides a voltage control signal to control the input voltage to maintain the first output node between a predetermined minimum and maximum battery voltage levels. A battery charge path is coupled to the reference node and battery charge mode depends upon the battery voltage.
    Type: Application
    Filed: July 23, 2008
    Publication date: February 5, 2009
    Applicant: Intersil Americas Inc.
    Inventors: Kun Xing, Greg J. Miller, Eric M. Solie
  • Patent number: 7420791
    Abstract: A power management IC including a dual purpose pin, a fault detection system, and a fault signature system. The dual purpose pin performs a power management function during normal operation (e.g., a soft start pin coupled to an external capacitor, a set pin coupled to an external resistor, a frequency set pin coupled to a resistor-capacitor combination, etc.). The fault detection system senses any of multiple fault conditions and provides a corresponding fault indicator signal, each indicating a corresponding fault condition. The fault signature system generates a selected fault signature signal on the dual purpose pin, where each fault signature signal has a characteristic indicative of a corresponding fault condition. Thus, an existing pin on the IC is re-used to indicate the fault condition. The fault signature signal may be a unique voltage level, a unique charging rate, a unique frequency signal, or any a combination thereof.
    Type: Grant
    Filed: August 9, 2004
    Date of Patent: September 2, 2008
    Assignee: Intersil Americas Inc.
    Inventors: Wei Dong, Kun Xing, Eric M. Solie
  • Patent number: 7102335
    Abstract: A rail—rail current sense amplifier including a low voltage current sense amplifier circuit, a high voltage current sense amplifier circuit, a first resistive device, and a selection circuit. The current sense amplifier senses current through a current sense device coupled to a battery node. The low voltage current sense amplifier circuit develops a first current that is proportional to current through the current sense device for low voltages up to an upper voltage threshold. The high voltage current sense amplifier circuit develops a second current that is proportional to current through the current sense device for high voltages down to a lower voltage threshold. The selection circuit selectively applies the first current to the first resistive device for low voltages up to the upper voltage threshold, and selectively applies the second current to the first resistive device for high voltages down to the lower voltage threshold.
    Type: Grant
    Filed: July 7, 2004
    Date of Patent: September 5, 2006
    Assignee: Intersil Americas Inc.
    Inventor: Eric M. Solie
  • Patent number: 6930520
    Abstract: A high bandwidth, feed-forward oscillator generates a ramp or sawtooth voltage for controlling the operation of a pulse width modulator-based, switched DC power supply circuit. The oscillator is operative to effectively immediately adjust the slope of each rising and falling portion of the ramp/sawtooth signal, as necessary, in proportion to the magnitude of the input voltage, while maintaining the frequency of the ramp waveform effectively constant. A comparator network establishes a difference between peak and valley portions of the sawtooth in accordance with input voltage. In response to a change in input voltage a control circuit modifies the value of the difference between the peak and valley portions to define a new set of respective peak and valley portions VpeakNEW and VvalleyNEW, and immediately causes the sawtooth waveform to transition to the new set of respective peak and valley portions VpeakNEW and VvalleyNEW at said prescribed frequency.
    Type: Grant
    Filed: February 23, 2004
    Date of Patent: August 16, 2005
    Assignee: Intersil Americas Inc.
    Inventor: Eric M. Solie
  • Publication number: 20040227549
    Abstract: A high bandwidth, feed-forward oscillator generates a ramp or sawtooth voltage for controlling the operation of a pulse width modulator-based, switched DC power supply circuit. The oscillator is operative to effectively immediately adjust the slope of each rising and falling portion of the ramp/sawtooth signal, as necessary, in proportion to the magnitude of the input voltage, while maintaining the frequency of the ramp waveform effectively constant. A comparator network establishes a difference between peak and valley portions of the sawtooth in accordance with input voltage. In response to a change in input voltage a control circuit modifies the value of the difference between the peak and valley portions to define a new set of respective peak and valley portions VpeakNEW and VvalleyNEW, and immediately causes the sawtooth waveform to transition to the new set of respective peak and valley portions VpeakNEW and VvalleyNEW at said prescribed frequency.
    Type: Application
    Filed: February 23, 2004
    Publication date: November 18, 2004
    Applicant: Intersil Americas Inc.
    Inventor: Eric M. Solie