Abstract: The present disclosure is directed to a high-voltage magnetron sputtering tool with an enhanced power source including a vacuum chamber containing a magnetron cathode with a magnet array, a target, and an anode, as well as the enhanced power source that includes high-power DC power source and controller that produces a pulsed output. In an aspect, the enhanced power source may include a standard power source that is retrofitted a supplemental high-power DC power source and controller, and alternatively, a high-power DC power source and controller that replaces the standard power source. In addition, the present disclosure is directed to methods for depositing a hydrogen-free diamond-like carbon film on a semiconductor substrate using the high-voltage magnetron sputtering tool. In an aspect, the hydrogen-free diamond-like carbon film may be an etch mask having a sp3 carbon bonding that is greater than 60 percent.

Abstract: Integrated circuitry comprising a ribbon or wire (RoW) transistor stack within which the transistors have different threshold voltages (Vt). In some examples, a gate electrode of the transistor stack may include only one workfunction metal. A metal oxide may be deposited around one or more channels of the transistor stack as a solid-state source of a metal oxide species that will diffuse toward the channel region(s). As diffused, the metal oxide may remain (e.g., as a silicate, or hafnate) in close proximity to the channel region, thereby altering the dipole properties of the gate insulator material. Different channels of a transistor stack may be exposed to differing amounts or types of the metal oxide species to provide a range of Vt within the stack. After diffusion, the metal oxide may be stripped as sacrificial, or retained.

Abstract: Provided are methods and compounds for using an adhesively switchable underlayer beneath a photoresist in a lithographic process for making a semiconductor wafer.

Abstract: Integrated circuitry comprising a ribbon or wire (RoW) transistor stack within which the transistors have different threshold voltages (Vt). In some examples, a gate electrode of the transistor stack may include only one workfunction metal. A metal oxide may be deposited around one or more channels of the transistor stack as a solid-state source of a metal oxide species that will diffuse toward the channel region(s). As diffused, the metal oxide may remain (e.g., as a silicate, or hafnate) in close proximity to the channel region, thereby altering the dipole properties of the gate insulator material. Different channels of a transistor stack may be exposed to differing amounts or types of the metal oxide species to provide a range of Vt within the stack. After diffusion, the metal oxide may be stripped as sacrificial, or retained.

Abstract: Precursors and methods related to a tin-based photoresist are disclosed herein. In some embodiments, a method for forming a tin-based photoresist may include exposing a tin-containing precursor and a co-reagent to a substrate to form a photoresist having tin clusters; selectively exposing the photoresist to extreme ultraviolet radiation (EUV); and exposing the photoresist to heat to form, in the region, crosslinking between the tin clusters. In some embodiments, the precursor has a formula R1R2Sn(N(CH3)2)2, and R1 and R2 are selected from the group consisting of neo-silyl, neo-pentyl, phenyl, benzyl, methyl-bis(trimethylsilyl), methyl, ethyl, isopropyl, tert-butyl, n-butyl, N,N-dimethylpropylamine, and N, N-dimethlybutylamine. In other embodiments, the precursor includes a chelating alkyl-amine or alkyl-amide ligand featuring a 5 membered or 6 membered tin-based heterocycle bound ?2-C,N with an alkyl group on the ligand backbone, wherein the alkyl group includes methyl, ethyl, vinyl, hydrogen, or tert-butyl.

Abstract: An integrated circuit includes a lower and upper device portions including bodies of semiconductor material extending horizontally between first source and drain regions in a spaced-apart vertical stack. A first gate structure is around a body in the lower device portion and includes a first gate electrode and a first gate dielectric. A second gate structure is around a body in the upper device portion and includes a second gate electrode and a second gate dielectric, where the first gate dielectric is compositionally distinct from the second gate dielectric. In some embodiments, a dipole species has a first concentration in the first gate dielectric and a different second concentration in the second gate dielectric. A method of fabrication is also disclosed.

Abstract: Described herein are integrated circuit devices with metal-oxide semiconductor channels and carbon source and drain (S/D) contacts. S/D contacts conduct current to and from the semiconductor devices, e.g., to the source and drain regions of a transistor. Carbon S/D contacts may be particularly useful with semiconductor devices that use certain channel materials, such as indium gallium zinc oxide.

Abstract: Integrated circuitry comprising a ribbon or wire (RoW) transistor stack within which the transistors have different threshold voltages (Vt). In some examples, a gate electrode of the transistor stack may include only one workfunction metal. A metal oxide may be deposited around one or more channels of the transistor stack as a solid-state source of a metal oxide species that will diffuse toward the channel region(s). As diffused, the metal oxide may remain (e.g., as a silicate, or hafnate) in close proximity to the channel region, thereby altering the dipole properties of the gate insulator material. Different channels of a transistor stack may be exposed to differing amounts or types of the metal oxide species to provide a range of Vt within the stack. After diffusion, the metal oxide may be stripped as sacrificial, or retained.

Abstract: A composition of graphene-based nanomaterials and a method of preparing the composition are provided. A carbon-based precursor is dissolved in water to form a precursor suspension. The precursor suspension is placed onto a substrate, thereby forming a precursor assembly. The precursor assembly is annealed, thereby forming the graphene-based nanomaterials. The graphene-based nanomaterials are crystallographically ordered at least in part and configured to form a plurality of diffraction rings when probed by an incident electron beam. In one aspect, the graphene-based nanomaterials are semiconducting. In one aspect, a method of engineering an energy bandgap of graphene monoxide generally includes providing at least one atomic layer of graphene monoxide having a first energy bandgap, and applying a substantially planar strain is applied to the graphene monoxide, thereby tuning the first energy band gap to a second energy bandgap.

Abstract: A composition of graphene-based nanomaterials and a method of preparing the composition are provided. A carbon-based precursor is dissolved in water to form a precursor suspension. The precursor suspension is placed onto a substrate, thereby forming a precursor assembly. The precursor assembly is annealed, thereby forming the graphene-based nanomaterials. The graphene-based nanomaterials are crystallographically ordered at least in part and configured to form a plurality of diffraction rings when probed by an incident electron beam. In one aspect, the graphene-based nanomaterials are semiconducting. In one aspect, a method of engineering an energy bandgap of graphene monoxide generally includes providing at least one atomic layer of graphene monoxide having a first energy bandgap, and applying a substantially planar strain is applied to the graphene monoxide, thereby tuning the first energy band gap to a second energy bandgap.