Patents by Inventor Eric Paton

Eric Paton has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 6399467
    Abstract: A method of forming a self-aligned silicide (salicide) with a screening oxide. The method improves transistor speed by lowering the leakage current in the source and drain areas and lowering the polysilicon sheet resistance of the gate. As a result of one embodiment of the present method, a silicide is formed over the gate area which is advantageously about two to three times thicker than silicide formations over the source and drain areas.
    Type: Grant
    Filed: December 8, 2000
    Date of Patent: June 4, 2002
    Assignee: Advanced Micro Devices
    Inventors: Jeff Erhardt, Eric Paton
  • Patent number: 6387786
    Abstract: The present invention relates to a method of forming a self-aligned silicide (salicide) by siliciding a gate area prior to siliciding a source and drain area and/or spacer formation. The method improves transistor speed by lowering the leakage current in the source and drain areas and lowering the polysilicon sheet resistance of the gate. As a result of one embodiment of the present method, a silicide is formed over the gate area that is advantageously thicker than silicide formations over the source and drain areas.
    Type: Grant
    Filed: December 8, 2000
    Date of Patent: May 14, 2002
    Assignee: Advanced Micro Devices
    Inventors: Jeff Erhardt, Eric Paton
  • Publication number: 20020000184
    Abstract: Exposure time is determined by a device which is sensitive to an environmental substance in a controlled environment. Embodiments include a humidity sensitive timer treated with a cobalt salt which changes colors after a certain exposure time within the controlled environment. Elapsed time is measured by exposing the timer to a humidity controlled environment and monitoring the timer for a change in color.
    Type: Application
    Filed: November 25, 1998
    Publication date: January 3, 2002
    Inventors: ERIC PATON, BALARAMAN MANI
  • Patent number: 6297107
    Abstract: A semiconductor structure having a gate dielectric between a gate electrode and a semiconductor substrate is formed with a high dielectric metal oxide layer by replacing a sacrificial gate oxide. Embodiments include forming the metal oxide layer by applying a chemical solution deposition of a metalorganic on to an exposed surface of the substrate followed by pyrolizing the metalorganic residue to a metal oxide.
    Type: Grant
    Filed: October 19, 2000
    Date of Patent: October 2, 2001
    Assignee: Advanced Micro Devices, Inc.
    Inventors: Eric Paton, Matthew S. Byunoski, Paul R. Besser, Paul L. King, Qi Xiang