Patents by Inventor Eric Payrat

Eric Payrat has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 8301905
    Abstract: A system and method for encrypting data. The system includes a controller and a processing element (PE) array coupled to the controller. The PE array is operative to perform one or more of encryption functions and decryption functions using an encryption algorithm. According to the system and method disclosed herein, by utilizing the PE array, the system encrypts and decrypts data efficiently and flexibly.
    Type: Grant
    Filed: September 8, 2006
    Date of Patent: October 30, 2012
    Assignee: Inside Secure
    Inventors: Daniele Fronte, Eric Payrat, Annie Perez
  • Patent number: 8183886
    Abstract: A multi-interface integrated circuit (IC) comprises a plurality of transistors, and a level detection block. At least one transistor of the plurality of transistors is in communication with a first terminal and either a first or a second lead of the multi-interface IC, and at least one of the plurality of transistors is in communication with the first terminal, a second terminal and either the first or a second lead of the multi-interface IC. The level detection block is in communication with at least one of the plurality of transistors and the first and second leads.
    Type: Grant
    Filed: February 8, 2011
    Date of Patent: May 22, 2012
    Assignee: Atmel Rousset S.A.S.
    Inventors: Eric Payrat, Majid Kaabouch
  • Publication number: 20110131345
    Abstract: A multi-interface integrated circuit (IC) comprises a plurality of transistors, and a level detection block. At least one transistor of the plurality of transistors is in communication with a first terminal and either a first or a second lead of the multi-interface IC, and at least one of the plurality of transistors is in communication with the first terminal, a second terminal and either the first or a second lead of the multi-interface IC. The level detection block is in communication with at least one of the plurality of transistors and the first and second leads.
    Type: Application
    Filed: February 8, 2011
    Publication date: June 2, 2011
    Inventors: Eric Payrat, Majid Kaabouch
  • Patent number: 7906989
    Abstract: A multi-interface integrated circuit (IC) comprises a plurality of transistors, and a level detection block. At least one transistor of the plurality of transistors is in communication with a first terminal and either a first or a second lead of the multi-interface IC, and at least one of the plurality of transistors is in communication with the first terminal, a second terminal and either the first or a second lead of the multi-interface IC. The level detection block is in communication with at least one of the plurality of transistors and the first and second leads.
    Type: Grant
    Filed: March 20, 2008
    Date of Patent: March 15, 2011
    Assignee: Atmel Rousset S.A.S.
    Inventors: Eric Payrat, Majid Kaabouch
  • Publication number: 20090240843
    Abstract: A multi-interface integrated circuit (IC) comprises a plurality of transistors, and a level detection block. At least one transistor of the plurality of transistors is in communication with a first terminal and either a first or a second lead of the multi-interface IC, and at least one of the plurality of transistors is in communication with the first terminal, a second terminal and either the first or a second lead of the multi-interface IC. The level detection block is in communication with at least one of the plurality of transistors and the first and second leads.
    Type: Application
    Filed: March 20, 2008
    Publication date: September 24, 2009
    Applicant: ATMEL CORPORATION
    Inventors: Eric Payrat, Majid Kaabouch
  • Publication number: 20080062803
    Abstract: A system and method for encrypting data. The system includes a controller and a processing element (PE) array coupled to the controller. The PE array is operative to perform one or more of encryption functions and decryption functions using an encryption algorithm. According to the system and method disclosed herein, by utilizing the PE array, the system encrypts and decrypts data efficiently and flexibly.
    Type: Application
    Filed: September 8, 2006
    Publication date: March 13, 2008
    Inventors: Daniele Fronte, Eric Payrat, Annie Perez