Abstract: Packaged semiconductor product (2) including a first semiconductor device (4A) and a packaging structure with a protective envelope (6) and a first and second external electrode (8,10). The first semiconductor device (4A) has a first substrate (11A) and is provided with a first passivation layer (12A) and a first electronic structure. The first substrate has a first main surface (14). The first substrate (11A) is embedded in the protective envelope (6) and the first main surface (14) faces a first opening (23) of the protective envelope (6). The first electronic structure has a first and a second contact region (20, 22) for electrically contacting the first electronic structure. The first passivation layer (12A) substantially covers the first main surface (14) and the first electronic structure. The protective envelope (6) extends between the first passivation layer (12A) and the first external electrode (8) towards the first contact region (20).

Abstract: Packaged semiconductor product (2) including a first semiconductor device (4A) and a packaging structure with a protective envelope (6) and a first and second external electrode (8,10). The first semiconductor device (4A) has a first substrate (11A) and is provided with a first passivation layer (12A) and a first electronic structure. The first substrate has a first main surface (14). The first substrate (11A) is embedded in the protective envelope (6) and the first main surface (14) faces a first opening (23) of the protective envelope (6). The first electronic structure has a first and a second contact region (20, 22) for electrically contacting the first electronic structure. The first passivation layer (12A) substantially covers the first main surface (14) and the first electronic structure. The protective envelope (6) extends between the first passivation layer (12A) and the first external electrode (8) towards the first contact region (20).

Abstract: A device for reading magnetic information, having at least one read head including at least one magnetoresistive bar MR for generating data pulses representative of information read by the head. To enable the bar to be biased accurately without requiring a measurement of the quiescent resistance of the bar, the device includes a control loop for controlling the power dissipated in the magnetoresistive bar, the control loop having a time constant which is large with respect to the duration of the data pulses.

Abstract: A preamplifier for a multi-head disk drive includes a circuit that tests the connectivity of each magnetic head in the disk drive by driving each head with a small current, and detecting the flow of this current. By driving and sensing the current flowing through the magnetic heads, both open-circuit faults and bridging faults can be detected. In a preferred embodiment, each head is tested sequentially. The result of each test is stored as a bit value in a register, for subsequent access. The circuit may be activated by a test device, or by a microcontroller in an assembled disk drive. To minimize costs, the circuit is integral to the circuitry that is conventionally used to read and write information via the magnetic heads. The oscillator that is conventionally used to characterize the read heads of a disk drive is used in a preferred embodiment to control the sequencing of tests through each head.

Abstract: A recording apparatus for recording an information signal on a magnetic record carrier includes a write driver circuit and a magnetic write head. The write driver circuit comprises a first voltage driver and a second voltage driver. A first current driver and a second current driver are present for driving the write head. The first and second voltage driver each include a respective series circuit of an npn transistor and a bidirectional impedance element coupled between a point of constant potential and the respective outputs of the first and second voltage drivers.

Abstract: A device for measuring the resistance of an MR element which passes a bias current Imr and which derives a bias voltage. A voltage comparator CMP receives the bias voltage Vmr and a reference voltage Vref. A counter UPCNT has an enable input EN coupled to the output of the comparator and a digital output forming the output of the device. A current source supplies the bias current Imr which represents a digital value received by the current source at its control input which is coupled to the digital output of the counter. The device enables the digital value of a resistance to be measured automatically.