Patents by Inventor Eric R Caspole

Eric R Caspole has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 9720708
    Abstract: Techniques are disclosed relating to data transformation for distributing workloads between processors or cores within a processor. In various embodiments, a first processing element receives a set of bytecode. The set of bytecode specifies a set of tasks and a first data structure that specifies data to be operated on during performance of the set of tasks. The first data structure is stored non-contiguously in memory of the computer system. In response to determining to offload the set of tasks to a second processing element of the computer system, the first processing element generates a second data structure that specifies the data. The second data structure is stored contiguously in memory of the computer system. The first processing element provides the second data structure to the second processing element for performance of the set of tasks.
    Type: Grant
    Filed: August 19, 2011
    Date of Patent: August 1, 2017
    Assignee: Advanced Micro Devices, Inc.
    Inventor: Eric R. Caspole
  • Publication number: 20140115291
    Abstract: Methods and systems for garbage collection are provided. The method includes and the system is configured for assigning a garbage collection thread to execute on a first node of a plurality of nodes in a non-uniform memory access (NUMA) computing system, determining whether each of a plurality of application threads is a local thread that is active on the first node, and selecting the local thread for garbage collection by the garbage collection thread when the local thread is active on the first node.
    Type: Application
    Filed: October 19, 2012
    Publication date: April 24, 2014
    Applicant: ADVANCED MICRO DEVICES, INC.
    Inventor: Eric R. Caspole
  • Publication number: 20130047155
    Abstract: Techniques are disclosed relating to data transformation for distributing workloads between processors or cores within a processor. In various embodiments, a first processing element receives a set of bytecode. The set of bytecode specifies a set of tasks and a first data structure that specifies data to be operated on during performance of the set of tasks. The first data structure is stored non-contiguously in memory of the computer system. In response to determining to offload the set of tasks to a second processing element of the computer system, the first processing element generates a second data structure that specifies the data. The second data structure is stored contiguously in memory of the computer system. The first processing element provides the second data structure to the second processing element for performance of the set of tasks.
    Type: Application
    Filed: August 19, 2011
    Publication date: February 21, 2013
    Inventor: Eric R. Caspole
  • Patent number: 8327109
    Abstract: A system and method for efficient garbage collection. A general-purpose central processing unit (CPU) partitions an allocated heap according to a generational garbage collection technique. The generations are partitioned into fixed size cards. The CPU marks indications of qualified dirty cards during application execution since the last garbage collection. When the CPU detects a next garbage collection start condition is satisfied, the CPU sends a notification to a special processing unit (SPU) corresponding to a determination of one or more card root addresses, each card root address corresponding to one of said marked indications. The SPU has a single instruction multiple data (SIMD) parallel architecture and may be a graphics processing unit (GPU). The SPU may utilize the parallel architecture of its SIMD core to simultaneously compute multiple card root addresses. Following, the SPU sends these addresses to the CPU to be used in a garbage collection algorithm.
    Type: Grant
    Filed: March 2, 2010
    Date of Patent: December 4, 2012
    Assignee: Advanced Micro Devices, Inc.
    Inventor: Eric R Caspole
  • Publication number: 20120036301
    Abstract: Techniques are disclosed relating to distributing workloads between processors and/or processing elements. A computer system having at least first and second processing elements may cause a request to initialize one or more memory regions to be handled by the second processing element. Initialization may be accomplished by the second processing element directly accessing a memory that includes the specified memory region to be initialized. Thus, while the second processing element is causing the memory region to be initialized, the first processing element is free to perform other computational tasks. A cache associated with the first processing element may be undisturbed as a result of the second processing element performing the initialization, which may avoid displacement of data from the cache.
    Type: Application
    Filed: August 3, 2010
    Publication date: February 9, 2012
    Inventors: Eric R. Caspole, Laurent Morichetti
  • Publication number: 20110219204
    Abstract: A system and method for efficient garbage collection. A general-purpose central processing unit (CPU) partitions an allocated heap according to a generational garbage collection technique. The generations are partitioned into fixed size cards. The CPU marks indications of qualified dirty cards during application execution since the last garbage collection. When the CPU detects a next garbage collection start condition is satisfied, the CPU sends a notification to a special processing unit (SPU) corresponding to a determination of one or more card root addresses, each card root address corresponding to one of said marked indications. The SPU has a single instruction multiple data (SIMD) parallel architecture and may be a graphics processing unit (GPU). The SPU may utilize the parallel architecture of its SIMD core to simultaneously compute multiple card root addresses. Following, the SPU sends these addresses to the CPU to be used in a garbage collection algorithm.
    Type: Application
    Filed: March 2, 2010
    Publication date: September 8, 2011
    Inventor: Eric R. Caspole