Patents by Inventor Eric S. Werness

Eric S. Werness has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 9401004
    Abstract: One embodiment of the present invention sets forth a technique for tracking and filtering state change methods provided to a graphics pipeline. State shadow circuitry at the start of the graphics pipeline may be configured in different modes. A track mode is used to capture the current state by storing state change methods that are transmitted to the graphics pipeline. A passthrough mode is used to provide different state data to the graphics pipeline without updating the current state stored in the state shadow circuitry. A replay mode is used to restore the current state to the graphics pipeline using the state shadow circuitry. Additionally, the state shadow circuitry may also be configured to filter the state change methods that are transmitted to graphics pipeline by removing redundant state change methods.
    Type: Grant
    Filed: October 12, 2010
    Date of Patent: July 26, 2016
    Assignee: NVIDIA Corporation
    Inventors: Jerome Francis Duluk, Jr., Jesse David Hall, Patrick R. Brown, Gregory Scott Palmer, Eric S. Werness
  • Patent number: 8970608
    Abstract: One embodiment of the present invention sets forth a technique for transmitting state information associated with at least one graphics command to a graphics processor. The method includes the steps of generating a state object that specifies a set of properties that is needed to execute a first graphics command within the graphics processor, storing in the state object a value associated with a first property included in the set of properties, marking a second property included in the set of properties as a dynamic property, where a value associated with the second property is not stored in the state object and can be updated without having to modify the state object, and transmitting the state object to the graphics processor in order to execute the first graphics command.
    Type: Grant
    Filed: April 1, 2011
    Date of Patent: March 3, 2015
    Assignee: NVIDIA Corporation
    Inventors: Jeffrey A. Bolz, Eric S. Werness, Jerome F. Duluk, Jr.
  • Patent number: 8669991
    Abstract: One embodiment of the present invention sets forth a method macro expander (MME) coupled to a driver and the processing pipeline of a graphics processing unit. In operation, the MME receives, from the driver, a first packet of work indicating a macro stored in an instruction memory that is to be executed. The MME then executes the commands of the macro in the instruction memory to generate a second packet of work, and the second packet of work is then transmitted to the processing pipeline for further execution.
    Type: Grant
    Filed: October 13, 2010
    Date of Patent: March 11, 2014
    Assignee: Nvidia Corporation
    Inventors: Jerome Francis Duluk, Jr., Jesse David Hall, Patrick R. Brown, Gregory Scott Palmer, Eric S. Werness
  • Patent number: 8537169
    Abstract: One embodiment of the present invention sets forth a method for accessing, from within a graphics processing unit (GPU), data objects stored in a memory accessible by the GPU. The method comprises the steps of creating a data object in the memory based on a command received from an application program, transmitting an address associated with the data object to the application program for providing data associated with different draw commands to the GPU, receiving a first draw command and the address associated with the data object from the application program, and transmitting the first draw command and the address associated with the data object to the GPU for processing.
    Type: Grant
    Filed: March 1, 2010
    Date of Patent: September 17, 2013
    Assignee: Nvidia Corporation
    Inventors: Jeffrey A. Bolz, Eric S. Werness, Jason Sams
  • Patent number: 8154554
    Abstract: Systems and methods for providing a unified instruction set allow shader programs of different types to use a common instruction set. The unified instruction set provides easy access for new graphics hardware features and faster compile times for shader programs. Programmers may use the unified instruction set to write fragment, vertex, or geometry programs. Functions that use the unified instruction set can be included in shader, vertex, or geometry programs without modification. Existing shader programs may be compiled to produce shader microcode based on the unified instruction set. The shader microcode may then be executed by processing units designed to support the unified instruction set.
    Type: Grant
    Filed: October 10, 2006
    Date of Patent: April 10, 2012
    Assignee: NVIDIA Corporation
    Inventors: Patrick R. Brown, Eric S. Werness
  • Publication number: 20120072701
    Abstract: One embodiment of the present invention sets forth a [TODO once claims are reviewed]
    Type: Application
    Filed: October 13, 2010
    Publication date: March 22, 2012
    Inventors: Jerome Francis Duluk, JR., Jesse David Hall, Patrick R. Brown, Gregory Scott Palmer, Eric S. Werness
  • Patent number: 8134566
    Abstract: Systems and methods for providing a unified instruction set allow shader programs of different types to use a common instruction set. The unified instruction set provides easy access for new graphics hardware features and faster compile times for shader programs. Programmers may use the unified instruction set to write fragment, vertex, or geometry programs. Functions that use the unified instruction set can be included in shader, vertex, or geometry programs without modification. Existing shader programs may be compiled to produce shader microcode based on the unified instruction set. The shader microcode may then be executed by processing units designed to support the unified instruction set.
    Type: Grant
    Filed: October 10, 2006
    Date of Patent: March 13, 2012
    Assignee: NVIDIA Corporation
    Inventors: Patrick R. Brown, Eric S. Werness
  • Publication number: 20110242118
    Abstract: One embodiment of the present invention sets forth a technique for transmitting state information associated with at least one graphics command to a graphics processor.
    Type: Application
    Filed: April 1, 2011
    Publication date: October 6, 2011
    Inventors: Jeffrey A. BOLZ, Eric S. Werness, Jerome F. Duluk, JR.
  • Patent number: 7928989
    Abstract: One embodiment of the invention is a method for storing transformed vertex attributes that includes the steps of allocating memory space for a transform feedback buffer, selecting one or more transformed vertex attributes to store in the transform feedback buffer independently of any shader programs executing on any processing units in the graphics rendering pipeline, configuring the transform feedback buffer to store the one or more transformed vertex attributes, and initiating a processing mode wherein vertex data is processed in the graphics rendering pipeline to produce the transformed vertices, the attributes of which are then written to the transform feedback buffer. One advantage is that the transform feedback buffer can be used to store and access transformed vertices, without having to convert the vertex data to a pixel format, store the pixels in a frame buffer, and then convert the pixels back to a vertex format.
    Type: Grant
    Filed: December 12, 2006
    Date of Patent: April 19, 2011
    Assignee: NVIDIA Corporation
    Inventors: Patrick R. Brown, Eric S. Werness, Barthold B. Lichtenbelt, Nicholas B. Carter
  • Publication number: 20110084977
    Abstract: One embodiment of the present invention sets forth a technique for tracking and filtering state change methods provided to a graphics pipeline. State shadow circuitry at the start of the graphics pipeline may be configured in different modes. A track mode is used to capture the current state by storing state change methods that are transmitted to the graphics pipeline. A passthrough mode is used to provide different state data to the graphics pipeline without updating the current state stored in the state shadow circuitry. A replay mode is used to restore the current state to the graphics pipeline using the state shadow circuitry. Additionally, the state shadow circuitry may also be configured to filter the state change methods that are transmitted to graphics pipeline by removing redundant state change methods.
    Type: Application
    Filed: October 12, 2010
    Publication date: April 14, 2011
    Inventors: Jerome Francis DULUK, JR., Jesse David Hall, Patrick R. Brown, Gregory Scott Palmer, Eric S. Werness
  • Patent number: 7839410
    Abstract: One embodiment of the invention is a method for accessing and updating data in a buffer object during the execution of a shader program. The method includes loading a plurality of data portions in the buffer object, initiating a first execution of a shader program that accesses a first portion of data in the buffer object, receiving a request to update the first portion of data in the buffer object; updating a version of the first portion of data in the buffer object to reflect the update, initiating a second execution of a shader program that accesses the updated version of the first portion of data in the buffer object, wherein the second execution of the shader program occurs without waiting for the execution of the first shader program to complete.
    Type: Grant
    Filed: December 12, 2006
    Date of Patent: November 23, 2010
    Assignee: NVIDIA Corporation
    Inventors: Patrick R. Brown, Eric S. Werness
  • Patent number: 7286133
    Abstract: A system, method and computer program product are provided for programmable processing of fragment data in a computer hardware graphics pipeline. Initially, fragment data is received in a hardware graphics pipeline. It is then determined whether the hardware graphics pipeline is operating in a programmable mode. If it is determined that the hardware graphics pipeline is operating in the programmable mode, programmable operations are performed on the fragment data in order to generate output. The programmable operations are performed in a manner/sequence specified in a graphics application program interface. If it is determined that the hardware graphics pipeline is not operating in the programmable mode, standard graphics application program interface (API) operations are performed on the fragment data in order to generate output.
    Type: Grant
    Filed: May 10, 2005
    Date of Patent: October 23, 2007
    Assignee: NVIDIA Corporation
    Inventors: Mark J. Kilgard, Patrick R. Brown, Eric S. Werness
  • Patent number: 6982718
    Abstract: A system, method and computer program product are provided for programmable processing of fragment data in a computer hardware graphics pipeline. Initially, fragment data is received in a hardware graphics pipeline. It is then determined whether the hardware graphics pipeline is operating in a programmable mode. If it is determined that the hardware graphics pipeline is operating in the programmable mode, programmable operations are performed on the fragment data in order to generate output. The programmable operations are performed in a manner/sequence specified in a graphics application program interface. If it is determined that the hardware graphics pipeline is not operating in the programmable mode, standard graphics application program interface (API) operations are performed on the fragment data in order to generate output.
    Type: Grant
    Filed: November 30, 2001
    Date of Patent: January 3, 2006
    Assignee: NVIDIA Corporation
    Inventors: Mark J. Kilgard, Patrick R. Brown, Eric S. Werness
  • Publication number: 20040066385
    Abstract: A system, method and computer program product are provided for programmable processing of fragment data in a computer hardware graphics pipeline. Initially, fragment data is received in a hardware graphics pipeline. It is then determined whether the hardware graphics pipeline is operating in a programmable mode. If it is determined that the hardware graphics pipeline is operating in the programmable mode, programmable operations are performed on the fragment data in order to generate output. The programmable operations are performed in a manner/sequence specified in a graphics application program interface. If it is determined that the hardware graphics pipeline is not operating in the programmable mode, standard graphics application program interface (API) operations are performed on the fragment data in order to generate output.
    Type: Application
    Filed: November 30, 2001
    Publication date: April 8, 2004
    Inventors: Mark J. Kilgard, Patrick R. Brown, Eric S. Werness