Abstract: Methods, systems and apparatuses provide for technology that detects an access to memory, wherein the memory is on a discrete graphics device that includes an accelerator, sets an idle hysteresis value of the memory to a first level if the access to the memory is associated with activity in the accelerator, and sets the idle hysteresis value of the memory to a second level if the access to the memory is not associated with the activity in the accelerator, wherein the second level is greater than the first level.

Abstract: A system that includes first circuitries to operate at a first clock frequency, second circuitries to operate at a second clock frequency, and circuitry to adjust the first and second clock frequencies. In some examples, the circuitry is to selectively adjust the first and second clock frequencies provided to the respective first circuitries and the second circuitries according to a target ratio based on temperature and power consumption of the first circuitries and the second circuitries, wherein the target ratio is based on clock frequencies of the first circuitries and the second circuitries, stall time of the first circuitries, and dynamic capacitance of the first circuitries and the second circuitries.

Abstract: Described herein, in one embodiment, is a graphics processor comprising a plurality of dies integrated in a package, at least one die of the plurality of dies functionally heterogeneous relative to at least one other die of the plurality of dies and manufactured with a different process technology than the at least one other die.

Abstract: A distributed and scalable all-digital LDO (D-DLDO) voltage regulator allowing rapid scaling across technology nodes. The distributed DLDO includes many tillable DLDO units regulating a single supply voltage with a shared power distribution network (PDN). The D-DLDO includes an all-digital proportional-integral-derivative (PID) controller that receives a first code indicative of a voltage behavior on a power supply rail. A droop detector is provided to compare the first code with a threshold to determine a droop event, wherein information about the droop event is provided to the PID controller, wherein the PID controller generates a second code according to the first code and the information about the droop event. The DLDO includes a plurality of power gates that receive the second code.

Abstract: Described herein, in one embodiment, are techniques to facilitate the partial powerdown of sub-components of an execution unit or other graphics processing resource based on the workload to be executed. In another embodiment, granular dynamic voltage and frequency scaling is enabled in which the voltage and frequency of groups of processing resources within a graphics processor can be separately scaled.

Abstract: A method for controlling a laser profiler, the laser profiler being configured for generating a laser line on a surface to be inspected, the method comprising: receiving an image of the laser line; determining an actual intensity of the laser line; calculating an amplification factor for the laser line based on the actual intensity of the laser line, a target intensity for the laser line, a power of the laser, a camera gain of the camera and an exposure time of the laser line on the surface to be inspected, the amplification factor allowing the actual intensity of the laser line to reach the target intensity while minimizing the power of the laser; and based on the calculated amplification factor, adjusting at least one parameter of the laser profiler so that the actual intensity of the laser line corresponds to the target intensity.

Abstract: Embodiments described herein include software, firmware, and hardware that provides techniques to enable deterministic scheduling across multiple general-purpose graphics processing units. One embodiment provides a multi-GPU architecture with uniform latency. One embodiment provides techniques to distribute memory output based on memory chip thermals. One embodiment provides techniques to enable thermally aware workload scheduling. One embodiment provides techniques to enable end to end contracts for workload scheduling on multiple GPUs.

Abstract: Described is an apparatus comprising a first circuitry and a second circuitry. The first circuitry may process a sequence of Graphics Processing Unit (GPU) commands including an instruction carrying a flag that indicates a workload characteristic corresponding with the sequence of GPU commands. The second circuitry may initiate a power-directed parameter adjustment based upon the flag.

Abstract: A method for controlling a laser profiler, the laser profiler being configured for generating a laser line on a surface to be inspected, the method comprising: receiving an image of the laser line; determining an actual intensity of the laser line; calculating an amplification factor for the laser line based on the actual intensity of the laser line, a target intensity for the laser line, a power of the laser, a camera gain of the camera and an exposure time of the laser line on the surface to be inspected, the amplification factor allowing the actual intensity of the laser line to reach the target intensity while minimizing the power of the laser; and based on the calculated amplification factor, adjusting at least one parameter of the laser profiler so that the actual intensity of the laser line corresponds to the target intensity.

Abstract: An all-digital voltage monitor (ADVM) generates a multi-bit output code that changes in proportion to a voltage being monitored, by leveraging the voltage impact on a gate delay. ADVM utilizes a simple delay chain, which receives a clock-cycle-long pulse every clock cycle, such that the monitored supply voltage is sampled for one full cycle every cycle. The outputs of all delay cells of the delay chain collectively represents a current voltage state as a digital thermometer code. In AVDM, a voltage droop event thus results in a decrease in the output code from a nominal value, while an overshoot results in an increase in the output code.

Abstract: An all-digital voltage monitor (ADVM) generates a multi-bit output code that changes in proportion to a voltage being monitored, by leveraging the voltage impact on a gate delay. ADVM utilizes a simple delay chain, which receives a clock-cycle-long pulse every clock cycle, such that the monitored supply voltage is sampled for one full cycle every cycle. The outputs of all delay cells of the delay chain collectively represents a current voltage state as a digital thermometer code. In AVDM, a voltage droop event thus results in a decrease in the output code from a nominal value, while an overshoot results in an increase in the output code.

Abstract: A distributed and scalable all-digital LDO (D-DLDO) voltage regulator allowing rapid scaling across technology nodes. The distributed DLDO includes many tillable DLDO units regulating a single supply voltage with a shared power distribution network (PDN). The D-DLDO includes an all-digital proportional-integral-derivative (PID) controller that receives a first code indicative of a voltage behavior on a power supply rail. A droop detector is provided to compare the first code with a threshold to determine a droop event, wherein information about the droop event is provided to the PID controller, wherein the PID controller generates a second code according to the first code and the information about the droop event. The DLDO includes a plurality of power gates that receive the second code.

Abstract: Described is an apparatus comprising a first circuitry and a second circuitry. The first circuitry may process a sequence of Graphics Processing Unit (GPU) commands including an instruction carrying a flag that indicates a workload characteristic corresponding with the sequence of GPU commands. The second circuitry may initiate a power-directed parameter adjustment based upon the flag.

Abstract: An all-digital voltage monitor (ADVM) generates a multi-bit output code that changes in proportion to a voltage being monitored, by leveraging the voltage impact on a gate delay. ADVM utilizes a simple delay chain, which receives a clock-cycle-long pulse every clock cycle, such that the monitored supply voltage is sampled for one full cycle every cycle. The outputs of all delay cells of the delay chain collectively represents a current voltage state as a digital thermometer code. In AVDM, a voltage droop event thus results in a decrease in the output code from a nominal value, while an overshoot results in an increase in the output code.

Abstract: In one embodiment execution units, graphics cores, or graphics sub-cores can be dynamically scaled across a frame of graphics operations. Available execution units within each graphics core may be scaled using utilization metrics such as the current utilization rate of the execution units and the submission of new draw calls. In one embodiment, one of more of the sub-cores within each graphics core may be enable or disabled based on current or past utilization of the sub-cores based on a set of current graphics operations.

Abstract: Calibration methods use a calibration target for obtaining the intrinsic and extrinsic camera parameters of one or more cameras are. The methods can include acquiring, with each camera, a sequence of target images representing the calibration target in different target poses and at different acquisition times. The methods can include identifying reference images from the target images, and defining volume bins, angle bins and multi-camera bins into which the reference images are stored. The reference images can be used to determine the intrinsic and extrinsic parameters of the one or more cameras. In some implementations, the calibration methods can enable a user to monitor the progress of the calibration process, for example by providing an interactive calibration target including an input/output user interface to guide the user in real-time during the acquisition of the target images and/or sensors to provide positional information about the target poses.

Abstract: Calibration methods use a calibration target for obtaining the intrinsic and extrinsic camera parameters of one or more cameras are. The methods can include acquiring, with each camera, a sequence of target images representing the calibration target in different target poses and at different acquisition times. The methods can include identifying reference images from the target images, and defining volume bins, angle bins and multi-camera bins into which the reference images are stored. The reference images can be used to determine the intrinsic and extrinsic parameters of the one or more cameras. In some implementations, the calibration methods can enable a user to monitor the progress of the calibration process, for example by providing an interactive calibration target including an input/output user interface to guide the user in real-time during the acquisition of the target images and/or sensors to provide positional information about the target poses.

Abstract: There is described an optical system for sensing the surface of an object. The system comprises: a light source for emitting at least one light beam centered on the optical axis of the system; a light reflector for reflecting the at least one incident light beam to generate at least two hollow conical light beams centered on the optical axis and having different opening angles, the at least two reflected hollow conical light beams for illuminating the surface; and an image capture device for imaging the illuminated surface.

Abstract: A method, system and computer program product for estimating degradation and durability characteristics of a reinforced concrete structure are provided. Location-dependent information conveying structural information associated with different locations along the concrete structure is received, the location-dependent information having been obtained by applying a non-destructive testing (NDT) process to the concrete structure. The location-dependent information is processed in combination with information conveying material properties and information conveying estimated environmental conditions to derive concrete degradation simulation data conveying estimated degradation and durability characteristics associated with the different locations along the concrete structure. A signal is then released, causing the estimated degradation and durability characteristics of the concrete structure to be displayed on a display device.

Abstract: There is described an optical system for sensing the surface of an object. The system comprises: a light source for emitting at least one light beam centered on the optical axis of the system; a light reflector for reflecting the at least one incident light beam to generate at least two hollow conical light beams centered on the optical axis and having different opening angles, the at least two reflected hollow conical light beams for illuminating the surface; and an image capture device for imaging the illuminated surface.