Patents by Inventor Eric Saugier
Eric Saugier has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Publication number: 20250002333Abstract: Wafer level proximity sensors are formed by processing a silicon substrate wafer and a silicon cap wafer separately, bonding the cap wafer to the substrate wafer to form a bonded wafer sandwich, and then selectively thinning the silicon substrate wafer and silicon cap wafer. The silicon substrate wafer is thinned first, and an interconnect structure of through-silicon vias is formed within the thinned silicon substrate wafer. The silicon cap wafer is then thinned to expose openings facing an area of the thinned silicon substrate wafer where a photosensitive region is location and facing an area of the thinned silicon substrate wafer where an emitter die is to be installed. After emitter die installation, the openings in the thinned silicon cap wafer are filled with a transparent material. The thinned silicon cap wafer further includes an opaque light barrier to block light transmission between the openings.Type: ApplicationFiled: June 28, 2023Publication date: January 2, 2025Applicant: STMicroelectronics International N.V.Inventor: Eric SAUGIER
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Publication number: 20230223277Abstract: An integrated circuit chip carrier includes a wall surrounding a cavity. The wall includes one or more levels where each level is formed from a layer of a resin around a block. The block is made of a material different from the resin. The block is removed to open the cavity.Type: ApplicationFiled: January 9, 2023Publication date: July 13, 2023Applicant: STMicroelectronics (Grenoble 2) SASInventors: Fanny LAPORTE, Ludovic FOURNEAUD, Eric SAUGIER
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Method for manufacturing a cover for an electronic package and electronic package comprising a cover
Patent number: 11688815Abstract: A cover for an electronic package is manufactured by placing an optical insert, having opposite faces and configured to allow light radiation to pass therethrough, between two opposite faces of a cavity of a mold in a position such that said optical faces of the optical insert make contact with said opposite faces of the cavity of the mold. A coating material is injected into the cavity and around the optical insert. The coating material is set to obtain a substrate that is overmolded around the optical insert so as to produce the cover. An electronic package includes an electronic chip mounted to a support substrate with the cover formed by the overmolded substrate mounted to the support substrate.Type: GrantFiled: October 27, 2020Date of Patent: June 27, 2023Assignee: STMicroelectronics (Grenoble 2) SASInventors: Karine Saxod, Alexandre Mas, Eric Saugier, Gaetan Lobascio, Benoit Besancon -
Patent number: 10978400Abstract: The disclosure concerns a semiconductor chip, which may be an interposer, having conductive through vias having a parallelepipedal shape.Type: GrantFiled: April 22, 2019Date of Patent: April 13, 2021Assignee: STMICROELECTRONICS (GRENOBLE 2) SASInventor: Eric Saugier
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Patent number: 10955289Abstract: An electronic module includes an ambient light sensor and a proximity sensor. The ambient light sensor includes an ambient light photodetector. The proximity sensor includes an infrared photoemitter, a reference infrared photodetector and another infrared photodetector. The ambient light sensor is arranged in a stack over the proximity sensor with a position that allows infrared photons transmitted by the infrared photoemitter to be received by the reference infrared photodetector.Type: GrantFiled: April 8, 2019Date of Patent: March 23, 2021Assignees: STMicroelectronics (Research & Development) Limited, STMicroelectronics (Grenoble 2) SASInventors: William Halliday, Eric Saugier, Roy Duffy
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METHOD FOR MANUFACTURING A COVER FOR AN ELECTRONIC PACKAGE AND ELECTRONIC PACKAGE COMPRISING A COVER
Publication number: 20210043780Abstract: A cover for an electronic package is manufactured by placing an optical insert, having opposite faces and configured to allow light radiation to pass therethrough, between two opposite faces of a cavity of a mold in a position such that said optical faces of the optical insert make contact with said opposite faces of the cavity of the mold. A coating material is injected into the cavity and around the optical insert. The coating material is set to obtain a substrate that is overmolded around the optical insert so as to produce the cover. An electronic package includes an electronic chip mounted to a support substrate with the cover formed by the overmolded substrate mounted to the support substrate.Type: ApplicationFiled: October 27, 2020Publication date: February 11, 2021Applicant: STMicroelectronics (Grenoble 2) SASInventors: Karine SAXOD, Alexandre MAS, Eric SAUGIER, Gaetan LOBASCIO, Benoit BESANCON -
Method for manufacturing a cover for an electronic package and electronic package comprising a cover
Patent number: 10833208Abstract: A cover for an electronic package is manufactured by placing an optical insert, having opposite faces and configured to allow light radiation to pass therethrough, between two opposite faces of a cavity of a mold in a position such that said optical faces of the optical insert make contact with said opposite faces of the cavity of the mold. A coating material is injected into the cavity and around the optical insert. The coating material is set to obtain a substrate that is overmolded around the optical insert so as to produce the cover. An electronic package includes an electronic chip mounted to a support substrate with the cover formed by the overmolded substrate mounted to the support substrate.Type: GrantFiled: September 25, 2019Date of Patent: November 10, 2020Assignee: STMicroelectronics (Grenoble 2) SASInventors: Karine Saxod, Alexandre Mas, Eric Saugier, Gaetan Lobascio, Benoit Besancon -
Patent number: 10811349Abstract: An electronic device includes a support wafer, an electronic chip and an encapsulating block for the electronic chip above the support wafer. The support wafer is provided with a first network of electrical connections and a second network of electrical connections formed solely by tracks. First electrical connection elements are interposed between first front electrical contacts of the electronic chip and rear electrical contacts of the first network. Second electrical connection elements are interposed between second front electrical contacts of the electronic chip and internal electrical contact zones of the tracks of the second network. The first network includes front external electrical contacts and the tracks exhibiting external electrical contact zones.Type: GrantFiled: August 23, 2018Date of Patent: October 20, 2020Assignees: STMicroelectronics (Grenoble 2) SAS, STMicroelectronics (Alps) SASInventors: David Auchere, Laurent Schwarz, Deborah Cogoni, Eric Saugier
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METHOD FOR MANUFACTURING A COVER FOR AN ELECTRONIC PACKAGE AND ELECTRONIC PACKAGE COMPRISING A COVER
Publication number: 20200020815Abstract: A cover for an electronic package is manufactured by placing an optical insert, having opposite faces and configured to allow light radiation to pass therethrough, between two opposite faces of a cavity of a mold in a position such that said optical faces of the optical insert make contact with said opposite faces of the cavity of the mold. A coating material is injected into the cavity and around the optical insert. The coating material is set to obtain a substrate that is overmolded around the optical insert so as to produce the cover. An electronic package includes an electronic chip mounted to a support substrate with the cover formed by the overmolded substrate mounted to the support substrate.Type: ApplicationFiled: September 25, 2019Publication date: January 16, 2020Applicant: STMicroelectronics (Grenoble 2) SASInventors: Karine SAXOD, Alexandre MAS, Eric SAUGIER, Gaetan LOBASCIO, Benoit BESANCON -
Patent number: 10483408Abstract: A cover for an electronic package is manufactured by placing an optical insert, having opposite faces and configured to allow light radiation to pass therethrough, between two opposite faces of a cavity of a mold in a position such that said optical faces of the optical insert make contact with said opposite faces of the cavity of the mold. A coating material is injected into the cavity and around the optical insert. The coating material is set to obtain a substrate that is overmolded around the optical insert so as to produce the cover. An electronic package includes an electronic chip mounted to a support substrate with the cover formed by the overmolded substrate mounted to the support substrate.Type: GrantFiled: August 29, 2017Date of Patent: November 19, 2019Assignee: STMicroelectronics (Grenoble 2) SASInventors: Karine Saxod, Alexandre Mas, Eric Saugier, Gaetan Lobascio, Benoit Besancon
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Publication number: 20190333859Abstract: The disclosure concerns a semiconductor chip, which may be an interposer, having conductive through vias having a parallelepipedal shape.Type: ApplicationFiled: April 22, 2019Publication date: October 31, 2019Inventor: Eric SAUGIER
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Publication number: 20190316959Abstract: An electronic module includes an ambient light sensor and a proximity sensor. The ambient light sensor includes an ambient light photodetector. The proximity sensor includes an infrared photoemitter, a reference infrared photodetector and another infrared photodetector. The ambient light sensor is arranged in a stack over the proximity sensor with a position that allows infrared photons transmitted by the infrared photoemitter to be received by the reference infrared photodetector.Type: ApplicationFiled: April 8, 2019Publication date: October 17, 2019Applicants: STMicroelectronics (Research & Development) Limited, STMicroelectronics (Grenoble 2) SASInventors: William HALLIDAY, Eric SAUGIER, Roy DUFFY
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Publication number: 20190067180Abstract: An electronic device includes a support wafer, an electronic chip and an encapsulating block for the electronic chip above the support wafer. The support wafer is provided with a first network of electrical connections and a second network of electrical connections formed solely by tracks. First electrical connection elements are interposed between first front electrical contacts of the electronic chip and rear electrical contacts of the first network. Second electrical connection elements are interposed between second front electrical contacts of the electronic chip and internal electrical contact zones of the tracks of the second network. The first network includes front external electrical contacts and the tracks exhibiting external electrical contact zones.Type: ApplicationFiled: August 23, 2018Publication date: February 28, 2019Applicants: STMicroelectronics (Grenoble 2) SAS, STMicroelectronics (Alps) SASInventors: David AUCHERE, Laurent SCHWARZ, Deborah COGONI, Eric SAUGIER
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Publication number: 20180190838Abstract: A cover for an electronic package is manufactured by placing an optical insert, having opposite faces and configured to allow light radiation to pass therethrough, between two opposite faces of a cavity of a mold in a position such that said optical faces of the optical insert make contact with said opposite faces of the cavity of the mold. A coating material is injected into the cavity and around the optical insert. The coating material is set to obtain a substrate that is overmolded around the optical insert so as to produce the cover. An electronic package includes an electronic chip mounted to a support substrate with the cover formed by the overmolded substrate mounted to the support substrate.Type: ApplicationFiled: August 29, 2017Publication date: July 5, 2018Applicant: STMicroelectronics (Grenoble 2) SASInventors: Karine Saxod, Alexandre Mas, Eric Saugier, Gaetan Lobascio, Benoit Besancon
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Publication number: 20170345796Abstract: An electronic device includes a carrier substrate, a first electronic chip and a second chip. The first chip is mounted on the carrier substrate via interposed electrical connection elements electrically connecting a front electrical connection network of the first chip and an electrical connection network of the carrier substrate. The second chip is mounted on the first chip via interposed electrical connection elements electrically connecting a front electrical connection network of the second chip and a back electrical connection network of the first chip Electrical connection wires electrically connect the back electrical connection network of the first chip to the electrical connection network of the carrier substrate.Type: ApplicationFiled: December 27, 2016Publication date: November 30, 2017Applicant: STMicroelectronics (Grenoble 2) SASInventor: Eric Saugier
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Publication number: 20170256514Abstract: Electronic devices are collectively fabricated from a main wafer which includes optical elements and a secondary wafer that are mounted one on top of the other to form a combined wafer. A mounting face of the secondary wafer is mated to a front face of the main wafer in such a manner that recesses within the mounting face of the secondary wafer are aligned over the optical elements. The thickness of the secondary wafer reduced until the recesses are opened to form ring structures with openings at the recesses. The combined wafer is diced to form electronic devices. A base wafer of the main wafer and the secondary wafer are made of a same semiconductor material (for example, silicon).Type: ApplicationFiled: August 17, 2016Publication date: September 7, 2017Applicant: STMicroelectronics (Grenoble 2) SASInventor: Eric Saugier
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Patent number: 9525094Abstract: A proximity sensor having a relatively small footprint includes a substrate, a semiconductor die, a light emitting device, and a cap. The light emitting device overlies the semiconductor die. The semiconductor die is secured to the substrate and includes a sensor area capable of detecting light from by the light emitting device. The cap also is secured to the substrate and includes a light barrier that prevents some of the light emitted by the light emitting device from reaching the sensor area. In one embodiment, the light emitting device and the semiconductor die are positioned on the same side of the substrate, wherein the light emitting device is positioned on the semiconductor die. In another embodiment, the light emitting device is positioned on one side of the substrate and the semiconductor die is positioned on an opposing side of the substrate.Type: GrantFiled: March 27, 2015Date of Patent: December 20, 2016Assignees: STMicroelectronics (Grenoble 2) SAS, STMicroelectronics Pte LtdInventors: Eric Saugier, Wing Shenq Wong, David Gani
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Publication number: 20160284920Abstract: A proximity sensor having a relatively small footprint includes a substrate, a semiconductor die, a light emitting device, and a cap. The light emitting device overlies the semiconductor die. The semiconductor die is secured to the substrate and includes a sensor area capable of detecting light from by the light emitting device. The cap also is secured to the substrate and includes a light barrier that prevents some of the light emitted by the light emitting device from reaching the sensor area. In one embodiment, the light emitting device and the semiconductor die are positioned on the same side of the substrate, wherein the light emitting device is positioned on the semiconductor die. In another embodiment, the light emitting device is positioned on one side of the substrate and the semiconductor die is positioned on an opposing side of the substrate.Type: ApplicationFiled: March 27, 2015Publication date: September 29, 2016Inventors: Eric SAUGIER, Wing Shenq WONG, David GANI
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Patent number: 9105766Abstract: An optical electronic package includes transmitting chip and a receiving chip fixed to a wafer. A transparent encapsulation structure is formed by a transparent plate and a transparent encapsulation block that are formed over the transmitter chip and at least a portion of the receiver chip, with the transparent encapsulation block embedding the transmitter chip. An opaque encapsulation block extends over the transparent plate and includes an opening that reveals a front area of the transparent plate. The front area is situated above an optical transmitter of the transmitting chip and is offset laterally relative to an optical sensor of the receiving chip.Type: GrantFiled: March 18, 2013Date of Patent: August 11, 2015Assignees: STMicroelectronics (Grenoble 2) SAS, STMicroelectronics PTE LTDInventors: Romain Coffy, Eric Saugier, Hk Looi, Norbert Chevrier
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Patent number: 9006904Abstract: An electronic package includes a substrate wafer with an interconnect network. A first chip is fixed to a front of the substrate, connected to the interconnect network and encapsulated by a body. A second chip is placed on a back side of the substrate wafer and connected to the interconnect network by back-side connection elements interposed between the back side of the substrate and a front side of the second chip. Front-side connection elements are placed on the front side of the substrate and connected to the interconnect network. The connection elements extend beyond the frontal face of the body. The package may be mounted on a board with an interposed thermally conductive material.Type: GrantFiled: October 18, 2012Date of Patent: April 14, 2015Assignee: STMicroelectronics (Grenoble 2) SASInventors: Dominique Marais, Jacques Chavade, Rémi Brechignac, Eric Saugier, Romain Coffy, Luc Petit