Patents by Inventor Eric Stephen Carlsgaard

Eric Stephen Carlsgaard has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20040114758
    Abstract: A digital, cable ready television functions without a standard point-of-deployment (POD) interface module. The television utilizes an IEEE 1394 compatible interface and module to perform processing functions, such as descrambling scrambled signals, and providing electronic program guide (EPG) information. The television receives an input signal containing scrambled signals. The scrambled signals are switched out of the main transport data stream to the descrambler via the IEEE 1394 compatible interface. The scrambled signals are descrambled in accordance with permission information embedded in the input signal and recombined with the main transport data stream, via the IEEE 1394 compatible interface, wherein descrambled signals replace scrambled signals. The combined signal is provided to a display/audio device in any appropriate format, such as HD-MPEG. The IEEE 1394 compatible interface module may also provide copy protected content.
    Type: Application
    Filed: October 16, 2003
    Publication date: June 17, 2004
    Inventors: Eric Stephen Carlsgaard, Ed Marshall Milbourn
  • Publication number: 20040004672
    Abstract: A combined de-interlacing and frame doubling system (114, 114′ and 114″) advantageously serves to de-interlace successive lines of Present Field Video data at twice the field rate to yield an output bit stream suitable for display on display device that utilizes progressive scanning. The de-interlacing and frame doubling system in accordance with present principles includes a frame memory mechanism (116, 116′ and 116″) for storing at least one frame of interlaced video having a prescribed field rate. At least one de-interlacing circuit (11401, 1140′1, 1140″) pulls at least two fields of video data from the memory mechanism at a rate of at least twice the field rate for performing a full de-interlacing function in half of a field period to generate the a progressive, frame doubled signal for receipt at the display device.
    Type: Application
    Filed: July 5, 2002
    Publication date: January 8, 2004
    Inventors: Eric Stephen Carlsgaard, David Leon Simpson, Michael Evan Crabb
  • Publication number: 20030223731
    Abstract: A method and apparatus for simultaneously recording and displaying video signals from two different video sources. The apparatus comprises a main channel processing circuit (148), a second channel processing circuit (150), and common circuitry (152). The common circuit comprises a digital video decoder pipe (112) that decodes both first and second encoded video signals. A PIP picture is produced using a common reference clock that is derived from the first video signal. In a record mode, a second channel clock reference is coupled to the second channel processing circuit to produce a recordable signal using a digital encoder. The recordable signal also forms a PIP picture that is coupled to the main channel processing circuit to produce a PIP picture that is used to monitor the recording process.
    Type: Application
    Filed: August 22, 2002
    Publication date: December 4, 2003
    Inventors: Eric Stephen Carlsgaard, Thomas Edward Horlander
  • Publication number: 20030020832
    Abstract: A method and apparatus for simultaneously recording and displaying video signals from two different video sources. The apparatus comprises a main channel processing circuit/logic (148), a second channel processing circuit/logic (150), and common circuitry/logic (152). The common circuitry comprises a digital video encoder pipe (112) that decodes both a first and second encoded video signals. The main channel processing circuit processes a first decoded video signal utilizing a first clock to form a main picture for display. The second channel processing circuit processes a second decoded video signal to form a PIP picture for combination with the main picture for display. The PIP picture is produced using a second clock signal that is independent from the first clock signal. In a record mode, the second channel clock is coupled to the second channel processing circuit to produce a recordable signal using a digital encoder.
    Type: Application
    Filed: August 22, 2002
    Publication date: January 30, 2003
    Inventors: Eric Stephen Carlsgaard, Thomas Edward Horlander
  • Publication number: 20020186320
    Abstract: A system as described herein enables a user to access auxiliary information when viewing an enhanced performance television signal or program. Particularly, a television signal system is operative, configured, and/or enabled to allow a user to access and/or utilize auxiliary information when viewing a high definition or progressive-scan television signal. Briefly, an exemplary television signal system receives the auxiliary information/data (e.g. closed caption data) on a selected interlaced standard definition input, processes the auxiliary data, and combines or overlays the auxiliary data with a television (video) signal received on a selected input that does not have its own embedded auxiliary information/data.
    Type: Application
    Filed: May 22, 2002
    Publication date: December 12, 2002
    Inventors: Eric Stephen Carlsgaard, Joseph Wayne Forler, William J. Testin