Patents by Inventor Eric Tan Swee Seng

Eric Tan Swee Seng has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 11101245
    Abstract: Multi-chip modules may include stacked semiconductor devices having spacers therebetween. Discrete conductive elements may extend over the active surface of an underlying semiconductor device from respective bond pads of the underlying semiconductor device, through a space formed by the spacers, to respective contact areas on a substrate. Each discrete conductive element extending through two side openings opposite one another may extend from a respective centrally located bond pad proximate to a central portion of the active surface of the underlying semiconductor device. Each discrete conductive element extending through another, perpendicular opening may extend from a respective peripheral bond pad located proximate to a peripheral portion of the active surface of the underlying semiconductor device.
    Type: Grant
    Filed: July 29, 2020
    Date of Patent: August 24, 2021
    Assignee: Micron Technology, Inc.
    Inventor: Eric Tan Swee Seng
  • Publication number: 20200365561
    Abstract: Multi-chip modules may include stacked semiconductor devices having spacers therebetween. Discrete conductive elements may extend over the active surface of an underlying semiconductor device from respective bond pads of the underlying semiconductor device, through a space formed by the spacers, to respective contact areas on a substrate. Each discrete conductive element extending through two side openings opposite one another may extend from a respective centrally located bond pad proximate to a central portion of the active surface of the underlying semiconductor device. Each discrete conductive element extending through another, perpendicular opening may extend from a respective peripheral bond pad located proximate to a peripheral portion of the active surface of the underlying semiconductor device.
    Type: Application
    Filed: July 29, 2020
    Publication date: November 19, 2020
    Inventor: Eric Tan Swee Seng
  • Patent number: 9269695
    Abstract: Methods of manufacturing semiconductor device assemblies include attaching a back side of a first semiconductor die to a substrate and structurally and electrically coupling a first end of laterally extending conductive elements to conductive terminals on or in a surface of the substrate. Second ends of the laterally extending conductive elements are structurally and electrically coupled to bond pads on or in an active surface of the first semiconductor die. Conductive structures are structurally and electrically coupled to bond pads of a second semiconductor die. At least some of the conductive structures are aligned with at least some of the bond pads of the first semiconductor die. An active surface of the second semiconductor die faces an active surface of the first semiconductor die. At least some of the conductive structures are structurally and electrically coupled to at least some of the bond pads of the first semiconductor die.
    Type: Grant
    Filed: November 25, 2014
    Date of Patent: February 23, 2016
    Assignee: Micron Technology, Inc.
    Inventors: Eric Tan Swee Seng, Lee Choon Kuan
  • Publication number: 20150303176
    Abstract: An assembly method that includes providing a first semiconductor device and positioning a second semiconductor device at least partially over the first semiconductor device is disclosed. Spacers space the active surface of the first semiconductor device substantially a predetermined distance apart from the back side of the second semiconductor device. Discrete conductive elements are extended between the active surface of the first semiconductor device and the substrate prior to positioning of the second semiconductor device. Intermediate portions of the discrete conductive elements pass through an aperture formed between the active surface of the first semiconductor device, the back side of the second semiconductor device, and two of the spacers positioned therebetween. Assemblies and packaged semiconductor devices that are formed in accordance with the method are also disclosed.
    Type: Application
    Filed: June 18, 2015
    Publication date: October 22, 2015
    Inventor: Eric Tan Swee Seng
  • Patent number: 9070641
    Abstract: An assembly method that includes providing a first semiconductor device and positioning a second semiconductor device at least partially over the first semiconductor device is disclosed. Spacers space the active surface of the first semiconductor device substantially a predetermined distance apart from the back side of the second semiconductor device. Discrete conductive elements are extended between the active surface of the first semiconductor device and the substrate prior to positioning of the second semiconductor device. Intermediate portions of the discrete conductive elements pass through an aperture formed between the active surface of the first semiconductor device, the back side of the second semiconductor device, and two of the spacers positioned therebetween. Assemblies and packaged semiconductor devices that are formed in accordance with the method are also disclosed.
    Type: Grant
    Filed: July 25, 2012
    Date of Patent: June 30, 2015
    Assignee: Micron Technology, Inc.
    Inventor: Eric Tan Swee Seng
  • Publication number: 20150076679
    Abstract: Methods of manufacturing semiconductor device assemblies include attaching a back side of a first semiconductor die to a substrate and structurally and electrically coupling a first end of laterally extending conductive elements to conductive terminals on or in a surface of the substrate. Second ends of the laterally extending conductive elements are structurally and electrically coupled to bond pads on or in an active surface of the first semiconductor die. Conductive structures are structurally and electrically coupled to bond pads of a second semiconductor die. At least some of the conductive structures are aligned with at least some of the bond pads of the first semiconductor die. An active surface of the second semiconductor die faces an active surface of the first semiconductor die. At least some of the conductive structures are structurally and electrically coupled to at least some of the bond pads of the first semiconductor die.
    Type: Application
    Filed: November 25, 2014
    Publication date: March 19, 2015
    Inventors: Eric Tan Swee Seng, Lee Choon Kuan
  • Patent number: 8384200
    Abstract: Semiconductor device assemblies include at least first and second semiconductor dice disposed in a face-to-face configuration. At least some of a plurality of conductive structures are electrically and structurally coupled to a bond pad of the first semiconductor die and a bond pad of the second semiconductor die. A first end of each of a plurality of laterally extending conductive elements may be structurally and electrically coupled to a conductive terminal of a substrate, and a second end of each laterally extending conductive element is structurally and electrically coupled to at least one of a bond pad of the first semiconductor die, a bond pad of the second semiconductor die, and a conductive structure. Methods include the fabrication of such assemblies. Electronic systems include at least one electronic signal processing device, at least one input or output device, and at least one memory device including such a semiconductor device assembly.
    Type: Grant
    Filed: February 22, 2006
    Date of Patent: February 26, 2013
    Assignee: Micron Technology, Inc.
    Inventors: Eric Tan Swee Seng, Lee Choon Kuan
  • Publication number: 20120295401
    Abstract: An assembly method that includes providing a first semiconductor device and positioning a second semiconductor device at least partially over the first semiconductor device is disclosed. Spacers space the active surface of the first semiconductor device substantially a predetermined distance apart from the back side of the second semiconductor device. Discrete conductive elements are extended between the active surface of the first semiconductor device and the substrate prior to positioning of the second semiconductor device. Intermediate portions of the discrete conductive elements pass through an aperture formed between the active surface of the first semiconductor device, the back side of the second semiconductor device, and two of the spacers positioned therebetween. Assemblies and packaged semiconductor devices that are formed in accordance with the method are also disclosed.
    Type: Application
    Filed: July 25, 2012
    Publication date: November 22, 2012
    Applicant: MICRON TECHNOLOGY, INC.
    Inventor: Eric Tan Swee Seng
  • Patent number: 8237290
    Abstract: An assembly method that includes providing a first semiconductor device and positioning a second semiconductor device at least partially over the first semiconductor device is disclosed. Spacers space the active surface of the first semiconductor device substantially a predetermined distance apart from the back side of the second semiconductor device. Discrete conductive elements are extended between the active surface of the first semiconductor device and the substrate prior to positioning of the second semiconductor device. Intermediate portions of the discrete conductive elements pass through an aperture formed between the active surface of the first semiconductor device, the back side of the second semiconductor device, and two of the spacers positioned therebetween. Assemblies and packaged semiconductor devices that are formed in accordance with the method are also disclosed.
    Type: Grant
    Filed: January 15, 2009
    Date of Patent: August 7, 2012
    Assignee: Micron Technology, Inc.
    Inventor: Eric Tan Swee Seng
  • Patent number: 7691726
    Abstract: The present disclosure describes microfeature workpieces, microelectronic component packages, and methods of forming microelectronic components and microelectronic component packages. In one particular example, a microelectronic component package includes a substrate and a microelectronic component that has a first surface with a surface area greater than that of a second surface. A cementitious material, e.g., a die attach paste, may attach the second surface of the microelectronic component to a mounting surface of the substrate, with the cementitious material extending outwardly beyond a perimeter of the second surface and covering a surface area of the mounting surface that is no greater than the surface area of the first surface. Such a microelectronic component package may be formed with a smaller footprint or, alternatively, may include a microelectronic component having larger dimensions in a microelectronic component package of the same size.
    Type: Grant
    Filed: May 15, 2007
    Date of Patent: April 6, 2010
    Assignee: Micron Technology, Inc.
    Inventor: Eric Tan Swee Seng
  • Publication number: 20090121338
    Abstract: An assembly method that includes providing a first semiconductor device and positioning a second semiconductor device at least partially over the first semiconductor device is disclosed. Spacers space the active surface of the first semiconductor device substantially a predetermined distance apart from the back side of the second semiconductor device. Discrete conductive elements are extended between the active surface of the first semiconductor device and the substrate prior to positioning of the second semiconductor device. Intermediate portions of the discrete conductive elements pass through an aperture formed between the active surface of the first semiconductor device, the back side of the second semiconductor device, and two of the spacers positioned therebetween. Assemblies and packaged semiconductor devices that are formed in accordance with the method are also disclosed.
    Type: Application
    Filed: January 15, 2009
    Publication date: May 14, 2009
    Applicant: MICRON TECHNOLOGY, INC.
    Inventor: Eric Tan Swee Seng
  • Patent number: 7528007
    Abstract: A method for assembling one or more semiconductor devices with an interposer includes positioning the one or more semiconductor devices within a receptacle that extends through the interposer, on a retention element that extends over at least a portion of the receptacle. Material may be introduced between at least a portion of an outer periphery of the one or more semiconductor devices and an inner periphery of the interposer to facilitate securing of the one or more semiconductor devices in place relative to the interposer. The retention element may be removed from the semiconductor devices. Once the one or more semiconductor devices are in place, they may be electrically connected to the interposer.
    Type: Grant
    Filed: April 25, 2006
    Date of Patent: May 5, 2009
    Assignee: Micron Technology, Inc.
    Inventors: Setho Sing Fee, Lim Thiam Chye, Steven W. Heppler, Leng Nam Yin, Keith Tan, Patrick Guay, Edmund Lua Koon Tian, Yap Kah Eng, Eric Tan Swee Seng
  • Patent number: 7492039
    Abstract: An assembly method that includes providing a first semiconductor device and positioning a second semiconductor device at least partially over the first semiconductor device is disclosed. Spacers space the active surface of the first semiconductor device substantially a predetermined distance apart from the back side of the second semiconductor device. Discrete conductive elements are extended between the active surface of the first semiconductor device and the substrate prior to positioning of the second semiconductor device. Intermediate portions of the discrete conductive elements pass through an aperture formed between the active surface of the first semiconductor device, the back side of the second semiconductor device, and two of the spacers positioned therebetween. Assemblies and packaged semiconductor devices that are formed in accordance with the method are also disclosed.
    Type: Grant
    Filed: May 3, 2006
    Date of Patent: February 17, 2009
    Assignee: Micron Technology, Inc.
    Inventor: Eric Tan Swee Seng
  • Publication number: 20080164591
    Abstract: The present disclosure suggests various microelectronic component assembly designs and methods for manufacturing microelectronic component assemblies. In one particular implementation, a microelectronic component assembly includes a microelectronic component, a substrate, and at least one bond wire. The substrate has a reduced-thickness base adjacent terminals of the microelectronic component and a body having a contact surface spaced farther from the microelectronic component than a bond pad surface of the base. The bond wire couples the microelectronic component to a bond pad carried by the bond pad surface and has a maximum height outwardly from the microelectronic component that is no greater than the height of the contact surface from the microelectronic component.
    Type: Application
    Filed: March 12, 2008
    Publication date: July 10, 2008
    Applicant: Micron Technology, Inc.
    Inventors: Eric Tan Swee Seng, Edmund Low Kwok Chung
  • Patent number: 7368810
    Abstract: Invertible microfeature device packages and associated methods for manufacture and use are disclosed. A package in accordance with one embodiment includes a microfeature device having a plurality of device contacts, and a conductive structure electrically connected to the contacts. The conductive structure can have first and second package contacts accessible for electrical coupling to at least one device external to the package, with the first package contacts accessible from a first direction and the second package contacts configured to receive solder balls and accessible from a second direction opposite the first. An encapsulant can be disposed adjacent to the microfeature device and the conductive structure and can have apertures aligned with the second package contacts to contain solder balls carried by the second package contacts.
    Type: Grant
    Filed: August 29, 2003
    Date of Patent: May 6, 2008
    Assignee: Micron Technology, Inc.
    Inventors: Eric Tan Swee Seng, Lim Thiam Chye
  • Patent number: 7365424
    Abstract: The present disclosure suggests various microelectronic component assembly designs and methods for manufacturing microelectronic component assemblies. In one particular implementation, a microelectronic component assembly includes a microelectronic component, a substrate, and at least one bond wire. The substrate has a reduced-thickness base adjacent terminals of the microelectronic component and a body having a contact surface spaced farther from the microelectronic component than a bond pad surface of the base. The bond wire couples the microelectronic component to a bond pad carried by the bond pad surface and has a maximum height outwardly from the microelectronic component that is no greater than the height of the contact surface from the microelectronic component.
    Type: Grant
    Filed: May 18, 2006
    Date of Patent: April 29, 2008
    Assignee: Micron Technology, Inc.
    Inventors: Eric Tan Swee Seng, Edmund Low Kwok Chung
  • Patent number: 7276790
    Abstract: An assembly method that includes providing a first semiconductor device and positioning a second semiconductor device at least partially over the first semiconductor device is disclosed. Spacers space the active surface of the first semiconductor device substantially a predetermined distance apart from the back side of the second semiconductor device. Discrete conductive elements are extended between the active surface of the first semiconductor device and the substrate prior to positioning of the second semiconductor device. Intermediate portions of the discrete conductive elements pass through an aperture formed between the active surface of the first semiconductor chip, the back side of the second semiconductor chip, and two of the spacers positioned therebetween. Assemblies and packaged semiconductor devices that are formed in accordance with the method are also disclosed.
    Type: Grant
    Filed: August 19, 2004
    Date of Patent: October 2, 2007
    Assignee: Micron Technology, Inc.
    Inventor: Eric Tan Swee Seng
  • Patent number: 7274095
    Abstract: A semiconductor device package interposer including a receptacle extending substantially therethrough. Methods for assembling the interposer with one or more semiconductor devices are also disclosed. A film may be secured to a bottom surface of the interposer so as to at least partially cover a bottom end of the receptacle. One or more semiconductor devices are positioned within the receptacle, on the film. Each semiconductor device within the receptacle may then be electrically connected to the interposer. An encapsulant material, which is introduced into the receptacle, extends at least between portions of the outer periphery of each semiconductor device within the receptacle and a peripheral edge of the receptacle. Upon curing, setting, or hardening, the encapsulant material retains each semiconductor device within the receptacle and maintains a lateral position of each semiconductor device with respect to the interposer. Semiconductor device packages and multi-chip modules are also disclosed.
    Type: Grant
    Filed: June 8, 2004
    Date of Patent: September 25, 2007
    Assignee: Micron Technology, Inc.
    Inventors: Setho Sing Fee, Lim Thiam Chye, Steven W. Heppler, Leng Nam Yin, Keith Tan, Patrick Guay, Edmund Lua Koon Tian, Yap Kah Eng, Eric Tan Swee Seng
  • Patent number: 7259451
    Abstract: Invertible microfeature device packages and associated methods for manufacture and use are disclosed. A package in accordance with one embodiment includes a microfeature device having a plurality of device contacts, and a conductive structure electrically connected to the contacts. The conductive structure can have first and second package contacts accessible for electrical coupling to at least one device external to the package, with the first package contacts accessible from a first direction and the second package contacts configured to receive solder balls and accessible from a second direction opposite the first. An encapsulant can be disposed adjacent to the microfeature device and the conductive structure and can have apertures aligned with the second package contacts to contain solder balls carried by the second package contacts.
    Type: Grant
    Filed: August 15, 2005
    Date of Patent: August 21, 2007
    Assignee: Micron Technology, Inc.
    Inventors: Eric Tan Swee Seng, Thiam Chye Lim
  • Patent number: 7218001
    Abstract: The present disclosure describes microfeature workpieces, microelectronic component packages, and methods of forming microelectronic components and microelectronic component packages. In one particular example, a microelectronic component package includes a substrate and a microelectronic component that has a first surface with a surface area greater than that of a second surface. A cementitious material, e.g., a die attach paste, may attach the second surface of the microelectronic component to a mounting surface of the substrate, with the cementitious material extending outwardly beyond a perimeter of the second surface and covering a surface area of the mounting surface that is no greater than the surface area of the first surface. Such a microelectronic component package may be formed with a smaller footprint or, alternatively, may include a microelectronic component having larger dimensions in a microelectronic component package of the same size.
    Type: Grant
    Filed: April 5, 2004
    Date of Patent: May 15, 2007
    Assignee: Micron Technology, Inc.
    Inventor: Eric Tan Swee Seng