Patents by Inventor Eric Tyson

Eric Tyson has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 10728062
    Abstract: In a computing system, various components/devices communicate with each other. For example, a microprocessor may communicate with memory or may communicate with another microprocessor over a link. Various factors such as the frequency and transmission speed of a signal can distort what is being communicated over a link. The problem becomes more pronounced as the transmission speed increases. To address this problem, devices on both ends of a link can cooperate to equalize the link. Equalization involves configuring the transmitting device to alter the signal being transmitted so that certain distortions introduced during transmission are negated by the time the signal arrives at the receiving device. Given that each link can have slightly different characteristics, appropriate equalization parameters need to be ascertained for each link. Introduced herein are improved techniques for performing equalization that are quick yet provide equalization parameters that are stable even in a noisy high-speed link.
    Type: Grant
    Filed: February 27, 2019
    Date of Patent: July 28, 2020
    Assignee: Nvidia Corporation
    Inventors: Eric Tyson, Mohammad Mobin, Vishnu Balan, Hitendra Dutt
  • Patent number: 10333565
    Abstract: A transmitter for a high speed serial communications link, a serial communications link, and a receiver for a high speed serial communications link are disclosed herein. In one embodiment, the transmitter includes: (1) a communications interface connected to a transmission medium having multiple lanes, and (2) a safe mode circuit coupled to the communications interface and configured to send data over the transmission medium in a safe mode, wherein in the safe mode at least one of the lanes is dedicated to transmitting a link detect signal for link detection.
    Type: Grant
    Filed: May 30, 2018
    Date of Patent: June 25, 2019
    Assignee: Nvidia Corporation
    Inventors: Dennis Ma, Marvin Denman, Eric Tyson, Stephen D. Glaser
  • Patent number: 10200154
    Abstract: A receiver, transmitter and method for early packet header verification are provided. In one embodiment, the method includes: (1) receiving a payload flit of a preceding packet and a header flit of a current packet; and (2) using a Cyclic Redundancy Check (CRC) in the header flit to verify the payload flit of the preceding packet and the header flit of the current packet.
    Type: Grant
    Filed: June 23, 2017
    Date of Patent: February 5, 2019
    Assignee: Nvidia Corporation
    Inventors: Stephen D. Glaser, Eric Tyson, Mark Hummel, Michael Osborn, Jonathan Owen, Marvin Denman, Dennis Ma, Denis Foley
  • Patent number: 10097203
    Abstract: A CRC generator, a method for computing a CRC of a data packet, and an electronic system, such as a circuit board, are disclosed herein. In one embodiment the method is for computing the CRC of a data packet to be transmitted on a serial communications link having multiple lanes. In one embodiment, the CRC generator includes: (1) a CRC calculator configured to define a CRC calculation of a data packet in sequential order and perform parallelized computations, according to the sequential order and the multiple lanes, to generate sub-CRC values and (2) combination circuitry configured to combine the sub-CRC values to provide the CRC value for the packet.
    Type: Grant
    Filed: November 12, 2015
    Date of Patent: October 9, 2018
    Assignee: Nvidia Corporation
    Inventors: Eric Tyson, Stephen D. Glaser, Mike Osborn, Mark Hummel
  • Publication number: 20180278278
    Abstract: A transmitter for a high speed serial communications link, a serial communications link, and a receiver for a high speed serial communications link are disclosed herein. In one embodiment, the transmitter includes: (1) a communications interface connected to a transmission medium having multiple lanes, and (2) a safe mode circuit coupled to the communications interface and configured to send data over the transmission medium in a safe mode, wherein in the safe mode at least one of the lanes is dedicated to transmitting a link detect signal for link detection.
    Type: Application
    Filed: May 30, 2018
    Publication date: September 27, 2018
    Inventors: Dennis Ma, Marvin Denman, Eric Tyson, Stephen D. Glaser
  • Patent number: 10003362
    Abstract: A transmitter for a serial communications link, a serial communications link and an electronic system are disclosed herein. In one embodiment, the transmitter includes: (1) a communications interface connected to a transmission medium and (2) a safe mode circuit coupled to the communications interface and configured to send data over the transmission medium in a safe mode.
    Type: Grant
    Filed: November 5, 2015
    Date of Patent: June 19, 2018
    Assignee: Nvidia Corporation
    Inventors: Dennis Ma, Marvin Denman, Eric Tyson, Stephen D. Glaser
  • Patent number: 9954984
    Abstract: A receiver, transmitter and method for enabling a replay using a packetized link protocol are provided. In one embodiment, the method includes: (1) transmitting a stream of packets including an untagged packet and (2) using synchronized counters to determine a sequence ID of the untagged packet, which is a corrupt/lost packet that needs to be retransmitted.
    Type: Grant
    Filed: October 14, 2015
    Date of Patent: April 24, 2018
    Assignee: Nvidia Corporation
    Inventors: Dennis Ma, Michael Osborn, Eric Tyson, Stephen D. Glaser, Marvin Denman, Jonathan Owen, Mark Hummel
  • Publication number: 20170288815
    Abstract: A receiver, transmitter and method for early packet header verification are provided. In one embodiment, the method includes: (1) receiving a payload flit of a preceding packet and a header flit of a current packet; and (2) using a Cyclic Redundancy Check (CRC) in the header flit to verify the payload flit of the preceding packet and the header flit of the current packet.
    Type: Application
    Filed: June 23, 2017
    Publication date: October 5, 2017
    Inventors: Stephen D. Glaser, Eric Tyson, Mark Hummel, Michael Osborn, Jonathan Owen, Marvin Denman, Dennis Ma, Denis Foley
  • Patent number: 9720768
    Abstract: A receiver, transmitter and method for early packet header verification are provided. In one embodiment, the method includes: (1) receiving a payload flit of a preceding packet and a header flit of a current packet; and (2) using a Cyclic Redundancy Check (CRC) in the header flit to verify the payload flit of the preceding packet and the header flit of the current packet.
    Type: Grant
    Filed: October 6, 2015
    Date of Patent: August 1, 2017
    Assignee: Nvidia Corporation
    Inventors: Stephen D. Glaser, Eric Tyson, Mark Hummel, Michael Osborn, Jonathan Owen, Marvin Denman, Dennis Ma, Denis Foley
  • Publication number: 20170141794
    Abstract: A CRC generator, a method for computing a CRC of a data packet, and an electronic system, such as a circuit board, are disclosed herein. In one embodiment the method is for computing the CRC of a data packet to be transmitted on a serial communications link having multiple lanes. In one embodiment, the CRC generator includes: (1) a CRC calculator configured to define a CRC calculation of a data packet in sequential order and perform parallelized computations, according to the sequential order and the multiple lanes, to generate sub-CRC values and (2) combination circuitry configured to combine the sub-CRC values to provide the CRC value for the packet.
    Type: Application
    Filed: November 12, 2015
    Publication date: May 18, 2017
    Inventors: Eric Tyson, Stephen D. Glaser, Mike Osborn, Mark Hummel
  • Publication number: 20170134054
    Abstract: A transmitter for a serial communications link, a serial communications link and an electronic system are disclosed herein. In one embodiment, the transmitter includes: (1) a communications interface connected to a transmission medium and (2) a safe mode circuit coupled to the communications interface and configured to send data over the transmission medium in a safe mode.
    Type: Application
    Filed: November 5, 2015
    Publication date: May 11, 2017
    Inventors: Dennis Ma, Marvin Denman, Eric Tyson, Stephen D. Glaser
  • Publication number: 20170111144
    Abstract: A receiver, transmitter and method for enabling a replay using a packetized link protocol are provided. In one embodiment, the method includes: (1) transmitting a stream of packets including an untagged packet and (2) using synchronized counters to determine a sequence ID of the untagged packet, which is a corrupt/lost packet that needs to be retransmitted.
    Type: Application
    Filed: October 14, 2015
    Publication date: April 20, 2017
    Inventors: Dennis Ma, Michael Osborn, Eric Tyson, Stephen D. Glaser, Marvin Denman, Jonathan Owen, Mark Hummel
  • Publication number: 20170097867
    Abstract: A receiver, transmitter and method for early packet header verification are provided. In one embodiment, the method includes: (1) receiving a payload flit of a preceding packet and a header flit of a current packet; and (2) using a Cyclic Redundancy Check (CRC) in the header flit to verify the payload flit of the preceding packet and the header flit of the current packet.
    Type: Application
    Filed: October 6, 2015
    Publication date: April 6, 2017
    Inventors: Stephen D. Glaser, Eric Tyson, Mark Hummel, Michael Osborn, Jonathan Owen, Marvin Denman, Dennis Ma, Denis Foley