Patents by Inventor Eric W. Mumper

Eric W. Mumper has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 5914543
    Abstract: A memory controller for supplying backup battery power when a main power supply voltage drops together with programmable plus power fail write protection. The controller includes supravoltage induced sleep mode operation, MOS switching between backup batteries during backup operation based on battery voltage levels and discharge circuitry for battery disposal.
    Type: Grant
    Filed: June 7, 1995
    Date of Patent: June 22, 1999
    Assignee: Dallas Semiconductor Corporation
    Inventors: Francis A. Scherpenberg, Eric W. Mumper, John W. Rea, Robert D. Lee
  • Patent number: 5581507
    Abstract: A memory controller for supplying backup battery power when a main power supply voltage drops together with programmable plus power fail write protection. The controller includes supravoltage induced sleep mode operation, MOS switching between backup batteries during backup operation based on battery voltage levels and discharge circuitry for battery disposal.
    Type: Grant
    Filed: June 7, 1995
    Date of Patent: December 3, 1996
    Assignee: Dallas Semiconductor Corporation
    Inventors: Francis A. Scherpenberg, Eric W. Mumper, John W. Rea, Robert D. Lee
  • Patent number: 5488284
    Abstract: A battery charger with varying applied voltage and varying series resistance invoked in response to battery charge level provides an optimizable multipart load line for charging. The multipart load line may be programmed into a memory within the battery charger, and thereby common design battery chargers may be configured with optimized multipart load lines for diverse batteries. Programming access can be over the charge current output terminal for both one-wire communication and programming high voltage for EPROM programming.
    Type: Grant
    Filed: September 30, 1992
    Date of Patent: January 30, 1996
    Assignee: Dallas Semiconductor Corporation
    Inventors: Donald R. Dias, Eric W. Mumper
  • Patent number: 5359233
    Abstract: Reset monitor for detection of power failure and external reset for devices such as microprocessors with the reset monitor providing a single settling time hold down of a reset signal. Preferred embodiments include bandgap reference with high current side compensating resistor, bond out options for analog parameter selection, glitch free state machine control of both detections, and external pushbutton debouncing both depression and release.
    Type: Grant
    Filed: September 28, 1990
    Date of Patent: October 25, 1994
    Assignee: Dallas Semiconductor Corporation
    Inventors: Eric W. Mumper, Donald R. Dias
  • Patent number: 5315549
    Abstract: A memory controller for supplying backup battery power when a main power supply voltage drops together with programmable plus power fail write protection. The controller includes supravoltage induced sleep mode operation, MOS switching between backup batteries during backup operation based on battery voltage levels and discharge circuitry for battery disposal.
    Type: Grant
    Filed: June 11, 1991
    Date of Patent: May 24, 1994
    Assignee: Dallas Semiconductor Corporation
    Inventors: Francis A. Scherpenberg, Eric W. Mumper, John W. Rea, Robert D. Lee
  • Patent number: 5223748
    Abstract: Battery monitor (100) with a transient pull down (172) for backup batteries which is active during power up and prevents the feedthrough charging of low or dead batteries causing a spurious power fail indication.
    Type: Grant
    Filed: December 11, 1990
    Date of Patent: June 29, 1993
    Assignee: Dallas Semiconductor Corp.
    Inventors: Eric W. Mumper, Donald R. Dias, Hal Kurkowski
  • Patent number: 5164613
    Abstract: Reset monitor for detection of power failure and external reset for devices such as microprocessors with the reset monitor providing a single settling time hold down of a reset signal. Preferred embodiments include bandgap reference with high current side compensating resistor, bond out options for analog parameter selection, glitch free state machine control of both detections, and external pushbutton debouncing both depression and release.
    Type: Grant
    Filed: July 16, 1991
    Date of Patent: November 17, 1992
    Assignee: Dallas Semiconductor Corporation
    Inventors: Eric W. Mumper, Francis A. Scherpenberg, William L. Payne, II