Patents by Inventor Erica L. Poelstra
Erica L. Poelstra has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
-
Publication number: 20250022955Abstract: Some embodiments include an assembly having pillars of semiconductor material arranged in rows extending along a first direction. The rows include spacing regions between the pillars. The rows are spaced from one another by gap regions. Two conductive structures are within each of the gap regions and are spaced apart from one another by a separating region. The separating region has a floor section with an undulating surface that extends across semiconductor segments and insulative segments. The semiconductor segments have upper surfaces which are above upper surfaces of the insulative segments; Transistors include channel regions within the pillars of semiconductor material, and include gates within the conductive structures. Some embodiments include methods for forming integrated circuitry.Type: ApplicationFiled: October 2, 2024Publication date: January 16, 2025Applicant: Micron Technology, Inc.Inventors: Sanh D. Tang, Hong Li, Erica L. Poelstra
-
Patent number: 12142680Abstract: Some embodiments include an assembly having pillars of semiconductor material arranged in rows extending along a first direction. The rows include spacing regions between the pillars. The rows are spaced from one another by gap regions. Two conductive structures are within each of the gap regions and are spaced apart from one another by a separating region. The separating region has a floor section with an undulating surface that extends across semiconductor segments and insulative segments. The semiconductor segments have upper surfaces which are above upper surfaces of the insulative segments; Transistors include channel regions within the pillars of semiconductor material, and include gates within the conductive structures. Some embodiments include methods for forming integrated circuitry.Type: GrantFiled: May 11, 2021Date of Patent: November 12, 2024Assignee: Micron Technology, Inc.Inventors: Sanh D. Tang, Hong Li, Erica L. Poelstra
-
Publication number: 20240365538Abstract: Some embodiments include a method of forming an integrated assembly. A structure is provided to have conductive lines, and to have rails over the conductive lines and extending in a direction which crosses the conductive lines. Each of the rails includes pillars of semiconductor material. The rails have sidewall surfaces along spaces between the rails. The pillars have upper segments, middle segments and lower segments. First-material liners are formed along the sidewall surfaces of the rails. A second material is formed over the liners. First sections of the liners are removed to form gaps between the second material and the sidewall surfaces of the rails. Second sections of the liners remain under the gaps. Conductive material is formed within the gaps. The conductive material is configured as conductive lines which are along the middle segments of the pillars.Type: ApplicationFiled: July 8, 2024Publication date: October 31, 2024Applicant: Micron Technology, Inc.Inventors: Hong Li, Ramaswamy Ishwar Venkatanarayanan, Sanh D. Tang, Erica L. Poelstra
-
Patent number: 12069852Abstract: Some embodiments include a method of forming an integrated assembly. A structure is provided to have conductive lines, and to have rails over the conductive lines and extending in a direction which crosses the conductive lines. Each of the rails includes pillars of semiconductor material. The rails have sidewall surfaces along spaces between the rails. The pillars have upper segments, middle segments and lower segments. First-material liners are formed along the sidewall surfaces of the rails. A second material is formed over the liners. First sections of the liners are removed to form gaps between the second material and the sidewall surfaces of the rails. Second sections of the liners remain under the gaps. Conductive material is formed within the gaps. The conductive material is configured as conductive lines which are along the middle segments of the pillars.Type: GrantFiled: July 12, 2022Date of Patent: August 20, 2024Assignee: Micron Technology, Inc.Inventors: Hong Li, Ramaswamy Ishwar Venkatanarayanan, Sanh D. Tang, Erica L. Poelstra
-
Publication number: 20220344350Abstract: Some embodiments include a method of forming an integrated assembly. A structure is provided to have conductive lines, and to have rails over the conductive lines and extending in a direction which crosses the conductive lines. Each of the rails includes pillars of semiconductor material. The rails have sidewall surfaces along spaces between the rails. The pillars have upper segments, middle segments and lower segments. First-material liners are formed along the sidewall surfaces of the rails. A second material is formed over the liners. First sections of the liners are removed to form gaps between the second material and the sidewall surfaces of the rails. Second sections of the liners remain under the gaps. Conductive material is formed within the gaps. The conductive material is configured as conductive lines which are along the middle segments of the pillars.Type: ApplicationFiled: July 12, 2022Publication date: October 27, 2022Applicant: Micron Technology, Inc.Inventors: Hong Li, Ramaswamy Ishwar Venkatanarayanan, Sanh D. Tang, Erica L. Poelstra
-
Patent number: 11444088Abstract: Some embodiments include a method of forming an integrated assembly. A structure is provided to have conductive lines, and to have rails over the conductive lines and extending in a direction which crosses the conductive lines. Each of the rails includes pillars of semiconductor material. The rails have sidewall surfaces along spaces between the rails. The pillars have upper segments, middle segments and lower segments. First-material liners are formed along the sidewall surfaces of the rails. A second material is formed over the liners. First sections of the liners are removed to form gaps between the second material and the sidewall surfaces of the rails. Second sections of the liners remain under the gaps. Conductive material is formed within the gaps. The conductive material is configured as conductive lines which are along the middle segments of the pillars.Type: GrantFiled: October 14, 2020Date of Patent: September 13, 2022Assignee: Micron Technology, Inc.Inventors: Hong Li, Ramaswamy Ishwar Venkatanarayanan, Sanh D. Tang, Erica L. Poelstra
-
Publication number: 20210265500Abstract: Some embodiments include an assembly having pillars of semiconductor material arranged in rows extending along a first direction. The rows include spacing regions between the pillars. The rows are spaced from one another by gap regions. Two conductive structures are within each of the gap regions and are spaced apart from one another by a separating region. The separating region has a floor section with an undulating surface that extends across semiconductor segments and insulative segments. The semiconductor segments have upper surfaces which are above upper surfaces of the insulative segments; Transistors include channel regions within the pillars of semiconductor material, and include gates within the conductive structures. Some embodiments include methods for forming integrated circuitry.Type: ApplicationFiled: May 11, 2021Publication date: August 26, 2021Applicant: Micron Technology, Inc.Inventors: Sanh D. Tang, Hong Li, Erica L. Poelstra
-
Patent number: 11024735Abstract: Some embodiments include an assembly having pillars of semiconductor material arranged in rows extending along a first direction. The rows include spacing regions between the pillars. The rows are spaced from one another by gap regions. Two conductive structures are within each of the gap regions and are spaced apart from one another by a separating region. The separating region has a floor section with an undulating surface that extends across semiconductor segments and insulative segments. The semiconductor segments have upper surfaces which are above upper surfaces of the insulative segments; Transistors include channel regions within the pillars of semiconductor material, and include gates within the conductive structures. Some embodiments include methods for forming integrated circuitry.Type: GrantFiled: October 8, 2019Date of Patent: June 1, 2021Assignee: Micron Technology, Inc.Inventors: Sanh D. Tang, Hong Li, Erica L. Poelstra
-
Publication number: 20210028177Abstract: Some embodiments include a method of forming an integrated assembly. A structure is provided to have conductive lines, and to have rails over the conductive lines and extending in a direction which crosses the conductive lines. Each of the rails includes pillars of semiconductor material. The rails have sidewall surfaces along spaces between the rails. The pillars have upper segments, middle segments and lower segments. First-material liners are formed along the sidewall surfaces of the rails. A second material is formed over the liners. First sections of the liners are removed to form gaps between the second material and the sidewall surfaces of the rails. Second sections of the liners remain under the gaps. Conductive material is formed within the gaps. The conductive material is configured as conductive lines which are along the middle segments of the pillars.Type: ApplicationFiled: October 14, 2020Publication date: January 28, 2021Applicant: Micron Technology, Inc.Inventors: Hong Li, Ramaswamy Ishwar Venkatanarayanan, Sanh D. Tang, Erica L. Poelstra
-
Patent number: 10818673Abstract: Some embodiments include a method of forming an integrated assembly. A structure is provided to have conductive lines, and to have rails over the conductive lines and extending in a direction which crosses the conductive lines. Each of the rails includes pillars of semiconductor material. The rails have sidewall surfaces along spaces between the rails. The pillars have upper segments, middle segments and lower segments. First-material liners are formed along the sidewall surfaces of the rails. A second material is formed over the liners. First sections of the liners are removed to form gaps between the second material and the sidewall surfaces of the rails. Second sections of the liners remain under the gaps. Conductive material is formed within the gaps. The conductive material is configured as conductive lines which are along the middle segments of the pillars.Type: GrantFiled: October 3, 2018Date of Patent: October 27, 2020Assignee: Micron Technology, Inc.Inventors: Hong Li, Ramaswamy Ishwar Venkatanarayanan, Sanh D. Tang, Erica L. Poelstra
-
Publication number: 20200111797Abstract: Some embodiments include a method of forming an integrated assembly. A structure is provided to have conductive lines, and to have rails over the conductive lines and extending in a direction which crosses the conductive lines. Each of the rails includes pillars of semiconductor material. The rails have sidewall surfaces along spaces between the rails. The pillars have upper segments, middle segments and lower segments. First-material liners are formed along the sidewall surfaces of the rails. A second material is formed over the liners. First sections of the liners are removed to form gaps between the second material and the sidewall surfaces of the rails. Second sections of the liners remain under the gaps. Conductive material is formed within the gaps. The conductive material is configured as conductive lines which are along the middle segments of the pillars.Type: ApplicationFiled: October 3, 2018Publication date: April 9, 2020Applicant: Micron Technology, Inc.Inventors: Hong Li, Ramaswamy Ishwar Venkatanarayanan, Sanh D. Tang, Erica L. Poelstra
-
Publication number: 20200052113Abstract: Some embodiments include an assembly having pillars of semiconductor material arranged in rows extending along a first direction. The rows include spacing regions between the pillars. The rows are spaced from one another by gap regions. Two conductive structures are within each of the gap regions and are spaced apart from one another by a separating region. The separating region has a floor section with an undulating surface that extends across semiconductor segments and insulative segments. The semiconductor segments have upper surfaces which are above upper surfaces of the insulative segments; Transistors include channel regions within the pillars of semiconductor material, and include gates within the conductive structures. Some embodiments include methods for forming integrated circuitry.Type: ApplicationFiled: October 8, 2019Publication date: February 13, 2020Applicant: Micron Technology, Inc.Inventors: Sanh D. Tang, Hong Li, Erica L. Poelstra
-
Patent number: 10461185Abstract: Some embodiments include an assembly having pillars of semiconductor material arranged in rows extending along a first direction. The rows include spacing regions between the pillars. The rows are spaced from one another by gap regions. Two conductive structures are within each of the gap regions and are spaced apart from one another by a separating region. The separating region has a floor section with an undulating surface that extends across semiconductor segments and insulative segments. The semiconductor segments have upper surfaces which are above upper surfaces of the insulative segments; Transistors include channel regions within the pillars of semiconductor material, and include gates within the conductive structures. Some embodiments include methods for forming integrated circuitry.Type: GrantFiled: May 10, 2018Date of Patent: October 29, 2019Assignee: Micron Technology, Inc.Inventors: Sanh D. Tang, Hong Li, Erica L. Poelstra
-
Publication number: 20190198668Abstract: Some embodiments include an assembly having pillars of semiconductor material arranged in rows extending along a first direction. The rows include spacing regions between the pillars. The rows are spaced from one another by gap regions. Two conductive structures are within each of the gap regions and are spaced apart from one another by a separating region. The separating region has a floor section with an undulating surface that extends across semiconductor segments and insulative segments. The semiconductor segments have upper surfaces which are above upper surfaces of the insulative segments; Transistors include channel regions within the pillars of semiconductor material, and include gates within the conductive structures. Some embodiments include methods for forming integrated circuitry.Type: ApplicationFiled: May 10, 2018Publication date: June 27, 2019Applicant: Micron Technology, Inc.Inventors: Sanh D. Tang, Hong Li, Erica L. Poelstra