Patents by Inventor Erich S. Boleyn

Erich S. Boleyn has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 8914509
    Abstract: An API including a registration function and a configuration function, is provided to an optical networking apparatus to facilitate registration of configuration specification delimiter pairs by service routines of function blocks of multi-protocol optical networking modules (MPONM), and extraction of configuration specifications for the function blocks from a configuration specification input set using the registered configuration specification delimiter pairs. In one embodiment, the configuration function also receives current configuration of the function blocks, and merges the received current configurations of the function blocks into a configuration specification output set, separating the merged configuration specification using the registered configuration specification delimiters.
    Type: Grant
    Filed: August 2, 2002
    Date of Patent: December 16, 2014
    Assignee: Null Networks LLC
    Inventors: Erich S. Boleyn, Juliet Z. Cai, Zhi Wang, Qiyong B. Bian, Jonathan A. Tuchow, Alfred C. She
  • Patent number: 7793067
    Abstract: In an embodiment, a system memory stores a set of input/output (I/O) translation tables. One or more I/O devices initiate direct memory access (DMA) requests including virtual addresses. An I/O memory management unit (IOMMU) is coupled to the I/O devices and the system memory, wherein the IOMMU is configured to translate the virtual addresses in the DMA requests to physical addresses to access the system memory according to an I/O translation mechanism implemented by the IOMMU. The IOMMU comprises one or more caches, and is configured to read translation data from the I/O translation tables responsive to a prefetch command that specifies a first virtual address. The reads are responsive to the first virtual address and the I/O translation mechanism, and the IOMMU is configured to store data in the caches responsive to the read translation data.
    Type: Grant
    Filed: April 30, 2008
    Date of Patent: September 7, 2010
    Assignee: Globalfoundries Inc.
    Inventors: Andrew G. Kegel, Mark D. Hummel, Erich S. Boleyn
  • Publication number: 20080209130
    Abstract: In an embodiment, a system memory stores a set of input/output (I/O) translation tables. One or more I/O devices initiate direct memory access (DMA) requests including virtual addresses. An I/O memory management unit (IOMMU) is coupled to the I/O devices and the system memory, wherein the IOMMU is configured to translate the virtual addresses in the DMA requests to physical addresses to access the system memory according to an I/O translation mechanism implemented by the IOMMU. The IOMMU comprises one or more caches, and is configured to read translation data from the I/O translation tables responsive to a prefetch command that specifies a first virtual address. The reads are responsive to the first virtual address and the I/O translation mechanism, and the IOMMU is configured to store data in the caches responsive to the read translation data.
    Type: Application
    Filed: April 30, 2008
    Publication date: August 28, 2008
    Inventors: Andrew G. Kegel, Mark D. Hummel, Erich S. Boleyn
  • Patent number: 7124273
    Abstract: A method and an apparatus are used to efficiently translate memory addresses. The translation scheme yields a translated address, a memory type for the translated address, and a fault bit for the translation.
    Type: Grant
    Filed: February 25, 2002
    Date of Patent: October 17, 2006
    Assignee: Intel Corporation
    Inventors: Andy Glew, Michael A. Kozuch, Erich S. Boleyn, Lawrence O. Smith, III, Gilbert Neiger, Richard Uhlig
  • Publication number: 20040057390
    Abstract: An API including a registration function and a configuration function, is provided to an optical networking apparatus to facilitate registration of configuration specification delimiter pairs by service routines of function blocks of multi-protocol optical networking modules (MPONM), and extraction of configuration specifications for the function blocks from a configuration specification input set using the registered configuration specification delimiter pairs. In one embodiment, the configuration function also receives current configuration of the function blocks, and merges the received current configurations of the function blocks into a configuration specification output set, separating the merged configuration specification using the registered configuration specification delimiters.
    Type: Application
    Filed: August 2, 2002
    Publication date: March 25, 2004
    Inventors: Erich S. Boleyn, Juliet Z. Cai, Zhi Wang, Qiyong B. Bian, Jonathan A. Tuchow, Alfred C. She
  • Publication number: 20030163662
    Abstract: A method and an apparatus are used to efficiently translate memory addresses. The translation scheme yields a translated address, a memory type for the translated address, and a fault bit for the translation.
    Type: Application
    Filed: February 25, 2002
    Publication date: August 28, 2003
    Inventors: Andy Glew, Michael A. Kozuch, Erich S. Boleyn, Lawrence O. Smith, Gilbert Neiger, Richard Uhlig