Abstract: A method of measuring the distance uses a terminal A and a terminal B, each terminal comprising an FMCW generator for generating a signal having a predetermined frequency to time function. Terminal A transmits a transmit signal in transmit periods, which alternate with mute periods without transmission. Terminal B shifts the received signal in time from a transmit period to a mute period, for example by generating a local periodic FMCW signal, determining an adaptation of the timing of that local periodic FMCW that is needed to bring it into a predetermined timing relation to the received signal and applying the adaptation in the mute period. Terminal B transmits the shifted signal, which is received by the receiver of terminal A.

Abstract: An amplifier circuit includes an amplifier stage (10) having an amplifier transistor (104) with a gate coupled to an input (100) of the amplifier stage, a source coupled to a reference connection (gnd) and a drain coupled to a positive power supply connection (V+). The amplifier circuit includes a bias stage (12) having a bias transistor (120), a drain resistance (124) and a source resistance (122). The bias transistor includes a gate coupled to a negative power supply connection (V?), a source coupled to the negative power supply connection (V?) via the source resistance and a drain coupled to the reference connection via the drain resistance and to the gate of the amplifier transistor. The bias stage includes a further resistance (20, 22) coupled from a node between the source of the bias transistor and the source resistance of the bias transistor to a circuit node that carries a voltage higher than the voltage at the negative power supply connection.

Abstract: An amplifier circuit has an amplifier stage (10), comprising an amplifier transistor (104) with a gate coupled to an input (100) of the amplifier stage (10), a source coupled to a reference connection (gnd) and a drain coupled to a positive power supply connection (V+). A bias stage (12) is provided comprising a bias transistor (120), a drain resistance (124) and a source resistance (122), the bias transistor (120) having a gate coupled to a negative power supply connection (V?), a source coupled to the negative power supply connection (V?) via the source resistance (122) and a drain coupled to the reference connection (gnd) via the drain resistance (124) and to the gate of the amplifier transistor (104). The bias stage comprises a further resistance (20, 22), coupled from a node between the source of the bias transistor and the source resistance of the bias transistor (120) to a circuit node that carries a voltage higher than the voltage at the negative power supply connection.

Abstract: A semiconductor device comprises a signal pin mounted on a base plate by adhesive. Parasitic capacitance exists between the pin and the base plate in the region of adhesive and may deleteriously affect the operation of circuitry in chip connected to pin by a bond wire. A bond wire connecting pin to the base plate has an inductance which forms a parallel resonant circuit with the parasitic capacitance, so that, at the resonant frequency, signals on pin at substantially the same frequency pass to or from the chip substantially unattenuated by the parasitic capacitance. Alternatively, the inductances of the signal pin and the bond wires may be such that, at the frequency of signals on the signal pin, an impedance transformation is provided between the input to the signal pin and the end of the first bond wire where it connects to the chip.