Patents by Inventor Erik Cegnar

Erik Cegnar has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 8269469
    Abstract: An equalizing method for ultracapacitor cell packs and/or series connected ultracapacitors.
    Type: Grant
    Filed: August 12, 2009
    Date of Patent: September 18, 2012
    Assignee: Ivus Industries, LLC
    Inventors: Erik Cegnar, Fred Jessup, Mike Maughan, David G. Alexander
  • Patent number: 7766665
    Abstract: A system for directly connecting multiple printed circuit boards (PCB) circuits without the need for peripheral connectors. Multiple PCBs are electrically and mechanically interfaced with one or more plated holes or tabs on at least one first PCB and one or more plated tabs or holes on at least one second PCB. The plated tab(s)/hole(s) from said second PCB mate with the corresponding plated tab(s)/hole(s) from said first PCB to form a mechanical and electrical interconnect.
    Type: Grant
    Filed: February 2, 2009
    Date of Patent: August 3, 2010
    Assignee: IVUS Industries, Inc.
    Inventors: Fred Jessup, Erik Cegnar, Mike Maughan, David G. Alexander
  • Publication number: 20100039072
    Abstract: An equalizing method for ultracapacitor cell packs and/or series connected ultracapacitors.
    Type: Application
    Filed: August 12, 2009
    Publication date: February 18, 2010
    Inventors: ERIK CEGNAR, FRED JESSUP, MIKE MAUGHAN, DAVID G. ALEXANDER
  • Publication number: 20090197435
    Abstract: A system for directly connecting multiple printed circuit boards (PCB) circuits without the need for peripheral connectors. Multiple PCBs are electrically and mechanically interfaced with one or more plated holes or tabs on at least one first PCB and one or more plated tabs or holes on at least one second PCB. The plated tab(s)/hole(s) from said second PCB mate with the corresponding plated tab(s)/hole(s) from said first PCB to form a mechanical and electrical interconnect.
    Type: Application
    Filed: February 2, 2009
    Publication date: August 6, 2009
    Inventors: FRED JESSUP, ERIK CEGNAR, MICHAEL MAUGHAN, DAVID G. ALEXANDER
  • Patent number: D664287
    Type: Grant
    Filed: October 13, 2011
    Date of Patent: July 24, 2012
    Inventor: Erik Cegnar