Patents by Inventor Erik de la Iglesia
Erik de la Iglesia has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 9424180Abstract: A storage system creates an abstraction of flash Solid State Device (SSD) media allowing random write operations of arbitrary size by a user while performing large sequential write operations of a uniform size to an SSD array. This reduces the number of random write operations performed in the SSD array and as a result increases performance of the SSD array. A control element determines when blocks from different buffers should be combined together or discarded based on fragmentation and read activity. This optimization scheme increases memory capacity and improves memory utilization and performance.Type: GrantFiled: February 10, 2014Date of Patent: August 23, 2016Assignee: VIOLIN MEMORY INC.Inventor: Erik de la Iglesia
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Patent number: 9374225Abstract: Security of a plurality of registered digital documents in a system are monitored and the monitoring includes determining whether signatures associated with the registered digital documents are included in data propagating in network traffic of the system. A particular signature of a particular document in the plurality of registered digital documents is detected from the data propagating in the network. It is determined, based at least in part on the detecting, that detection of the particular signature exceeds a threshold detection rate for registered digital documents in the system. The particular signature is removed from a signature database including the signatures of the plurality of registered digital documents.Type: GrantFiled: September 30, 2013Date of Patent: June 21, 2016Assignee: McAfee, Inc.Inventors: Ratinder Paul Singh Ahuja, Matthew Howard, Rick Lowe, Erik de la Iglesia, William Deninger
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Patent number: 9344525Abstract: A system and method of managing the storage of data in a data system when data is to be migrated between a first data system and a second data system is disclosed. A plurality of storage processors is disposed in the communications paths between clients and the first and the second data systems. A chunk of data to be migrated from the first data system to the second data system is represented by a bit map identifying the data that has been transferred, and the bit maps of each of a group of storage processors of the plurality of storage processors performing the migration is maintained coherent across the storage processors. The migration process permits read and write access to the data during the migration process.Type: GrantFiled: November 25, 2013Date of Patent: May 17, 2016Assignee: VIOLIN MEMORY INC.Inventor: Erik de la Iglesia
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Patent number: 9244861Abstract: Cluster data is generated based on a history of storage operations. The cluster data may include an address range and an access history. The access history may comprise a bit pattern that represents a history of storage operations associated with a cluster. A prefix or counter may identify the number of storage operations identified in the bit pattern. The bit pattern and/or address range may be updated to reflect new storage operations associated with the cluster. The bit pattern then may determine when to cache data in a cache memory.Type: GrantFiled: November 13, 2013Date of Patent: January 26, 2016Assignee: VIOLIN MEMORY INC.Inventor: Erik de la Iglesia
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Patent number: 9195407Abstract: A storage processor is configured to identify a first disk drive and a second shadow drive associated with the first disk drive to an initiator. The storage processor receives storage commands from an initiator. When the storage commands access the first disk drive, the storage processor issues a first storage operation to the first disk drive. When the storage commands access the second shadow drive, the storage processor issues different storage operations to the first disk drive that are not supported by the initiator.Type: GrantFiled: January 17, 2014Date of Patent: November 24, 2015Assignee: VIOLIN MEMORY INC.Inventor: Erik de la Iglesia
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Patent number: 9092471Abstract: In one embodiment of the present invention, a rule compiler can compress a plurality of rules to be parsed over a block of data into one state table tree structure. In one embodiment of the present invention, rue parsing over the block of data includes selecting a unit of the block of data, indexing into a state table of the state table tree using the selected unit. The state table indexed into can be used for determining whether a decision regarding the block of data can be reached based on the indexed entry, and for selecting a next state table indicated by the indexed entry if the decision regarding the block of data cannot be reached.Type: GrantFiled: February 14, 2014Date of Patent: July 28, 2015Assignee: McAfee, Inc.Inventors: Erik de la Iglesia, William J. Deninger
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Patent number: 9094338Abstract: A system and method for capturing objects and balancing systems resources in a capture system are described. An object is captured, metadata associated with the objected generated, and the object and metadata stored.Type: GrantFiled: March 21, 2014Date of Patent: July 28, 2015Assignee: McAFEE, INC.Inventors: Ratinder Paul Singh Ahuja, William Deninger, Erik de la Iglesia, Rick Lowe
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Patent number: 9069676Abstract: A hardware search structure determines the status of cache lines associated with a large disk array and at the same time reduces the amount of memory space needed for tracking the status. The search structure is configurable in hardware to different cache line sizes and different primary and secondary index sizes. A maintenance feature invalidates state record entries based both on their time stamps and on associated usage statistics.Type: GrantFiled: February 12, 2013Date of Patent: June 30, 2015Assignee: VIOLIN MEMORY, INC.Inventors: Erik de la Iglesia, Som Sikdar, David Parker, Sivaram Dommeti
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Publication number: 20150149605Abstract: A system and method of managing the storage of data in a data system when data is to be migrated between a first data system and a second data system is disclosed. A plurality of storage processors is disposed in the communications paths between clients and the first and the second data systems. A chunk of data to be migrated from the first data system to the second data system is represented by a bit map identifying the data that has been transferred, and the bit maps of each of a group of storage processors of the plurality of storage processors performing the migration is maintained coherent across the storage processors. The migration process permits read and write access to the data during the migration process.Type: ApplicationFiled: November 25, 2013Publication date: May 28, 2015Inventor: Erik de la Iglesia
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Publication number: 20150134915Abstract: Cluster data is generated based on a history of storage operations. The cluster data may include an address range and an access history. The access history may comprise a bit pattern that represents a history of storage operations associated with a cluster. A prefix or counter may identify the number of storage operations identified in the bit pattern. The bit pattern and/or address range may be updated to reflect new storage operations associated with the cluster. The bit pattern then may determine when to cache data in a cache memory. The bit pattern tracks a large number of storage operations in a relatively small amount of memory enabling quick effective caching decisions.Type: ApplicationFiled: November 13, 2013Publication date: May 14, 2015Applicant: VIOLIN MEMORY INC.Inventor: Erik de la Iglesia
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Patent number: 8972689Abstract: A storage processor identifies latency of memory drives for different numbers of concurrent storage operations. The identified latency is used to identify debt limits for the number of concurrent storage operations issued to the memory drives. The storage processor may issue additional storage operations to the memory devices when the number of storage operations is within the debt limit. Storage operations may be deferred when the number of storage operations is outside the debt limit.Type: GrantFiled: February 2, 2011Date of Patent: March 3, 2015Assignee: Violin Memory, Inc.Inventor: Erik de la Iglesia
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Patent number: 8959288Abstract: Cache lines are identified that provide incorrect data for read requests. The cache lines are invalidated before the incorrect data causes processing failure conditions. The cache lines providing incorrect data may be detected according to a number of the same read requests to the same cache lines. The cache lines may also be identified according to an amount of time between the same read requests to the same cache lines. The same read requests to the same cache lines may be identified according to associated start addresses and address lengths.Type: GrantFiled: August 3, 2010Date of Patent: February 17, 2015Assignee: Violin Memory, Inc.Inventors: Erik de la Iglesia, Som Sikdar, Sivaram Dommeti, Garry Knox
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Publication number: 20150032942Abstract: A storage system creates an abstraction of flash Solid State Device (SSD) media allowing random write operations of arbitrary size by a user while performing large sequential write operations of a uniform size to an SSD array. This reduces the number of random write operations performed in the SSD array and as a result increases performance of the SSD array. A control element determines when blocks from different buffers should be combined together or discarded based on fragmentation and read activity. This optimization scheme increases memory capacity and improves memory utilization and performance.Type: ApplicationFiled: February 10, 2014Publication date: January 29, 2015Applicant: VIOLIN MEMORY, INC.Inventor: Erik de la Iglesia
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Publication number: 20140304452Abstract: A storage access system provides consistent memory access times for storage media with inconsistent access latency and reduces bottlenecks caused by the variable time delays during memory write operations. Data is written iteratively into multiple different media devices to prevent write operations from blocking all other memory access operations. The multiple copies of the same data then allow subsequent read operations to avoid the media devices currently servicing the write operations. Write operations can be aggregated together to improve the overall write performance to a storage media. A performance index determines how many media devices store the same data. The number of possible concurrent reads varies according to the number of media devices storing the data. Therefore, the performance index provides different selectable Quality of Service (QoS) for data in the storage media.Type: ApplicationFiled: April 3, 2013Publication date: October 9, 2014Applicant: VIOLIN MEMORY INC.Inventor: Erik de la Iglesia
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Publication number: 20140289416Abstract: A system and method for capturing objects and balancing systems resources in a capture system are described. An object is captured, metadata associated with the objected generated, and the object and metadata stored.Type: ApplicationFiled: March 21, 2014Publication date: September 25, 2014Inventors: Ratinder Paul Singh Ahuja, William Deninger, Erik de la Iglesia, Rick Lowe
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Patent number: 8838850Abstract: A cluster of storage control members connect different clients to different storage disks. Connection path information between the different clients and disks is discovered and distributed to the storage cluster members. The connection path information is then used to maintain coherency between tiering media contained in the different storage cluster members. Unique Small Computer System Interface (SCSI) identifiers may be associated with the different connection paths to uniquely identify particular storage disks connected to the clients.Type: GrantFiled: November 16, 2009Date of Patent: September 16, 2014Assignee: Violin Memory, Inc.Inventors: Sivaram Dommeti, Som Sikdar, Erik de la Iglesia
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Patent number: 8830836Abstract: A fiber channel network is configured into different zones. A first zone of the fiber channel network is configured with an initiator port, a first virtual port for a first physical port on a storage proxy, and a first virtual port for a second physical port on the storage proxy. A second zone of the fiber channel network is configured with a storage target port, a second virtual port for the first physical port on a storage proxy, and a second virtual port for the second physical port on the storage proxy. The virtual ports configured on the storage proxy increase the amount of bandwidth in the fiber channel available for asymmetric data transfers.Type: GrantFiled: January 3, 2013Date of Patent: September 9, 2014Assignee: Violin Memory, Inc.Inventors: Erik de la Iglesia, Surya Nambala
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Patent number: 8832384Abstract: A storage proxy receives different abstracted memory access requests that are abstracted from the original memory access requests from different sources. The storage proxy reconstructs the characteristics of the original memory access requests from the abstracted memory access requests and makes prefetch decisions based on the reconstructed characteristics. An inflight table is configured to identify contiguous address ranges formed by an accumulation of sub-address ranges used by different abstracted memory access requests. An operation table is configured to identify the number of times the contiguous address ranges are formed by the memory access operations. A processor is then configured to prefetch the contiguous address ranges for certain corresponding read requests.Type: GrantFiled: July 29, 2010Date of Patent: September 9, 2014Assignee: Violin Memory, Inc.Inventor: Erik de la Iglesia
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Publication number: 20140229653Abstract: A hardware search structure determines the status of cache lines associated with a large disk array and at the same time reduces the amount of memory space needed for tracking the status. The search structure is configurable in hardware to different cache line sizes and different primary and secondary index sizes. A maintenance feature invalidates state record entries based both on their time stamps and on associated usage statistics.Type: ApplicationFiled: February 12, 2013Publication date: August 14, 2014Inventors: Erik de la Iglesia, Som Sikdar, David Parker, Sivaram Dommeti
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Patent number: 8788758Abstract: A storage proxy loads cache lines with data from a storage device. Storage access requests are received from an initiator and directed to the storage device. The storage proxy provides the data from the cache lines in response to cache hits on the cache lines, and provides the data from the storage device in response to cache misses on the cache lines. Hit access times are identified for the cache lines in response to the cache hits and miss access times are identified for the storage device in response to cache misses. Data in the cache lines is updated with data from the storage device based on the hit access times and the miss access times associated with the cache lines.Type: GrantFiled: January 12, 2011Date of Patent: July 22, 2014Assignee: Violin Memory IncInventor: Erik de la Iglesia