Patents by Inventor Erik de la Iglesia

Erik de la Iglesia has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20050289181
    Abstract: Objects can be extracted from data flows captured by a capture device. Each captured object can then be classified according to content. In one embodiment, the present invention includes determining whether a captured object is binary or textual in nature, and classifying the captured object as one of a plurality of textual content types based tokens found in the captured object if the captured object is determined to be textual in nature.
    Type: Application
    Filed: June 23, 2004
    Publication date: December 29, 2005
    Inventors: William Deninger, Erik de la Iglesia
  • Publication number: 20050273614
    Abstract: A document accessible over a network can be registered. A registered document, and the content contained therein, cannot be transmitted undetected over and off of the network. In one embodiment, the invention includes maintaining a plurality of stored signatures over a registered document. In one embodiment, the plurality of stored signatures are generated by extracting content from the document, normalizing the extracted content, and generating the plurality of signatures using the normalized content.
    Type: Application
    Filed: June 7, 2004
    Publication date: December 8, 2005
    Inventors: Ratinder Ahuja, Erik de la Iglesia, Rick Lowe, Matthew Howard
  • Publication number: 20050177725
    Abstract: Objects can be extracted from data flows captured by a capture device. Each captured object can then be classified according to content. Meta-data about captured objects can be stored in a tag. In one embodiment, the present invention includes receiving a request to present a previously captured object to a user, accessing a tag associated with the requested object, the tag containing metadata related to the object, the metadata including an object signature, and verifying that the object has not been altered since capture using the object signature before presenting the object to the user.
    Type: Application
    Filed: November 22, 2004
    Publication date: August 11, 2005
    Inventors: Rick Lowe, Shaun Coleman, Erik de la Iglesia, Samuel King, Ashish Khasgiwala
  • Publication number: 20050166066
    Abstract: Objects can be extracted from data flows captured by a capture device. In one embodiment, the invention includes assigning to each captured object a cryptographic status based on whether the captured object is encrypted. In one embodiment, the invention further includes determining whether the object violated a cryptographic policy using the assigned cryptographic status of the object.
    Type: Application
    Filed: November 22, 2004
    Publication date: July 28, 2005
    Inventors: Ratinder Paul Singh Ahuja, Shaun Coleman, Erik de la Iglesia
  • Publication number: 20050132046
    Abstract: Content leaving a local network can be captured and indexed so that queries can be performed on the captured data. In one embodiment, the present invention comprises an apparatus that connects to a network. In one embodiment, this apparatus includes a network interface module to connect the apparatus to a network, a packet capture module to intercept packets being transmitted on the network, an object assembly module to reconstruct objects being transmitted on the network from the intercepted packets, an object classification module to determine the content in the reconstructed objects, and an object store module to store the objects. This apparatus can also have a user interface to enable a user to search objects stored in the object store module.
    Type: Application
    Filed: March 30, 2004
    Publication date: June 16, 2005
    Inventors: Erik de la Iglesia, Rick Lowe, Ratinder Paul Ahuja, William Deninger, Samuel King, Ashish Khasgiwala, Don Massaro
  • Publication number: 20050127171
    Abstract: A document accessible over a network can be registered. A registered document, and the content contained therein, cannot be transmitted undetected over and off of the network. In one embodiment, the invention includes maintaining a plurality of stored signatures, each signature being associated with one of a plurality of registered documents, intercepting an object being transmitted over a network, calculating a set of signatures associated with the intercepted object, and comparing the set of signatures with the plurality of stored signatures. In one embodiment, the invention can further include detecting registered content from the registered document being contained in the intercepted object, if the comparison results in a match of at least one of the signatures in the set of signatures with one or more of the plurality of stored signatures.
    Type: Application
    Filed: March 30, 2004
    Publication date: June 16, 2005
    Inventors: Ratinder Paul Ahuja, Matthew Howard, Rick Lowe, Erik de la Iglesia
  • Patent number: 6732288
    Abstract: The present invention relates to an error correction and selective inversion circuit (ESIC). The ESIC includes a power-on logic state (POLS) bus having a data signal and an error code correction (ECC) generator having an input coupled to the POLS bus. The ECC generator includes one or more correction pins. The ESIC also includes an inversion generator having an input attached to the POLS bus in parallel with the ECC generator. The output of the inversion generator is integrated with the output of on or more correction pins from the ECC generator so as to form an inverted data signal output. An inverted data signal is recovered by the ESIC in an inversion recovery.
    Type: Grant
    Filed: September 6, 2002
    Date of Patent: May 4, 2004
    Assignee: Intel Corporation
    Inventors: Erik A. de la Iglesia, Pochang Hsu, Rajendra M. Abhyankar, Siripong Sritanyaratana
  • Patent number: 6553545
    Abstract: An apparatus includes a test circuit, a first counter and a second counter. The test circuit is fabricated on a semiconductor substrate to generate an oscillating signal. The oscillating signal has a frequency that is dependent on at least in part a parameter of a process used to fabricate the test circuit. The first counter measures a time interval, and the second counter is coupled to the first counter to count a number of periods of the oscillating signal during the time interval.
    Type: Grant
    Filed: June 29, 2000
    Date of Patent: April 22, 2003
    Assignee: Intel Corporation
    Inventors: Jason C. Stinson, Erik A. De La Iglesia
  • Publication number: 20030066005
    Abstract: The present invention relates to an error correction and selective inversion circuit (ESIC). The ESIC includes a power-on logic state (POLS) bus having a data signal and an error code correction (ECC) generator having an input coupled to the POLS bus. The ECC generator includes one or more correction pins. The ESIC also includes an inversion generator having an input attached to the POLS bus in parallel with the ECC generator. The output of the inversion generator is integrated with the output of on or more correction pins from the ECC generator so as to form an inverted data signal output. An inverted data signal is recovered by the ESIC in an inversion recovery.
    Type: Application
    Filed: September 6, 2002
    Publication date: April 3, 2003
    Inventors: Erik A. de la Iglesia, Pochang Hsu, Rajendra M. Abkyankar, Siripong Sritanyaratana
  • Patent number: 6490703
    Abstract: The present invention relates to an error correction and selective inversion circuit (ESIC). The ESIC includes a power-on logic state (POLS) bus having a data signal and an error code correction (ECC) generator having an input coupled to the POLS bus. The ECC generator includes one or more correction pins. The ESIC also includes an inversion generator having an input attached to the POLS bus in parallel with the ECC generator. The output of the inversion generator is integrated with the output of on or more correction pins from the ECC generator so as to form an inverted data signal output. An inverted data signal is recovered by the ESIC in an inversion recovery.
    Type: Grant
    Filed: September 30, 1999
    Date of Patent: December 3, 2002
    Assignee: Intel Corporation
    Inventors: Erik A. de la Iglesia, Pochang Hsu, Rajendra M. Abhyankar, Siripong Sritanyaratana