Patents by Inventor Erik Demaine

Erik Demaine has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 8766665
    Abstract: A family of reconfigurable asynchronous logic elements that interact with their nearest neighbors permits reconfigurable implementation of circuits that are asynchronous at the bit level. A reconfigurable asynchronous logic cell comprises a set of one-bit buffers for communication with at least one neighboring cell, each buffer capable of having several states and configured for receiving input state tokens from neighboring cells and for transferring output state tokens to neighboring cells, and a one-bit processor configured to perform a logic operation utilizing received tokens as inputs and to produce an output token reflecting the result of the logic operation, wherein the logic operation and the functional configuration of the buffers are reconfigurably programmable. A reconfigurable logic circuit comprises a plurality of reconfigurable logic cells that compute by locally passing state tokens and are reconfigured by the directed shifting of programming instructions through neighboring logic cells.
    Type: Grant
    Filed: September 6, 2011
    Date of Patent: July 1, 2014
    Assignee: Massachusetts Institute of Technology
    Inventors: David Allen Dalrymple, Erik Demaine, Neil Gershenfeld, Forrest Green, Ara Knaian
  • Publication number: 20120062277
    Abstract: A family of reconfigurable asynchronous logic elements that interact with their nearest neighbors permits reconfigurable implementation of circuits that are asynchronous at the bit level. A reconfigurable asynchronous logic cell comprises a set of one-bit buffers for communication with at least one neighboring cell, each buffer capable of having several states and configured for receiving input state tokens from neighboring cells and for transferring output state tokens to neighboring cells, and a one-bit processor configured to perform a logic operation utilizing received tokens as inputs and to produce an output token reflecting the result of the logic operation, wherein the logic operation and the functional configuration of the buffers are reconfigurably programmable. A reconfigurable logic circuit comprises a plurality of reconfigurable logic cells that compute by locally passing state tokens and are reconfigured by the directed shifting of programming instructions through neighboring logic cells.
    Type: Application
    Filed: September 6, 2011
    Publication date: March 15, 2012
    Applicant: MASSACHUSETTS INSTITUTE OF TECHNOLOGY
    Inventors: David Allen Dalrymple, Erik Demaine, Neil Gershenfeld, Forrest Green, Ara Knaian
  • Patent number: 8013629
    Abstract: A family of reconfigurable asynchronous logic elements that interact with their nearest neighbors permits reconfigurable implementation of circuits that are asynchronous at the bit level, rather than at the level of functional blocks. These elements pass information by means of tokens. Each cell is self-timed, and cells that are configured as interconnect perform at propagation delay speeds, so no hardware non-local connections are needed. A reconfigurable asynchronous logic element comprises a set of edges for communication with at least one neighboring cell, each edge having an input for receiving tokens from neighboring cells and an output for transferring tokens to at least one neighboring cell, circuitry configured to perform a logic operation utilizing received tokens as inputs and to produce an output token reflecting the result of the logic operation, and circuitry.
    Type: Grant
    Filed: September 16, 2009
    Date of Patent: September 6, 2011
    Assignee: Massachusetts Institute of Technology
    Inventors: David Allen Dalrymple, Erik Demaine, Neil Gershenfeld, Forrest Green, Ara Knaian
  • Publication number: 20100185837
    Abstract: A family of reconfigurable asynchronous logic elements that interact with their nearest neighbors permits reconfigurable implementation of circuits that are asynchronous at the bit level, rather than at the level of functional blocks. These elements pass information by means of tokens. Each cell is self-timed, and cells that are configured as interconnect perform at propagation delay speeds, so no hardware non-local connections are needed. A reconfigurable asynchronous logic element comprises a set of edges for communication with at least one neighboring cell, each edge having an input for receiving tokens from neighboring cells and an output for transferring tokens to at least one neighboring cell, circuitry configured to perform a logic operation utilizing received tokens as inputs and to produce an output token reflecting the result of the logic operation, and circuitry.
    Type: Application
    Filed: September 16, 2009
    Publication date: July 22, 2010
    Applicant: Massachussetts Institute of Technology
    Inventors: David Allen Dalrymple, Erik Demaine, Neil Gershenfeld, Forrest Green, Ara Knaian