Patents by Inventor Erik Heinemann
Erik Heinemann has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Publication number: 20240275127Abstract: A semiconductor chip with a structured chip back side is specified, the chip back side being configured for electrical and thermal linking of the semiconductor chip, the semiconductor chip having emitter regions configured for producing electromagnetic radiation and the structured chip back side having connection pads configured for electrical linking of the emitter regions. The connection pads are p-contacts or n-contacts, with, in a plan view, all connection pads (which are configured either as p-contacts or as n-contacts overlapping with at least two of the emitter regions in each case and each of these connection pads being configured for electrical linking of only one of the emitter regions. Moreover, a component is specified, in particular comprising at least one such semiconductor chip.Type: ApplicationFiled: June 9, 2022Publication date: August 15, 2024Applicant: ams-OSRAM International GmbHInventors: Jörg Erich SORG, Erik HEINEMANN, André SOMERS, Thomas KIPPES, Sebastian SCHLEGL, Matthias HEIDEMANN
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Patent number: 9368700Abstract: An optoelectronic component includes a substrate, on which a semiconductor chip and a wettable attractor element are arranged. A medium including pigments at least regionally covers the exposed region of the substrate that is not covered by the semiconductor chip and the attractor element. The medium at least partly wets the semiconductor chip and the attractor element.Type: GrantFiled: June 27, 2012Date of Patent: June 14, 2016Assignee: OSRAM OPTO SEMICONDUCTORS GMBHInventors: Simon Jerebic, Erik Heinemann, Markus Pindl, Michael Bestele, Jan Marfeld
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Publication number: 20140191272Abstract: An optoelectronic component includes a substrate, on which a semiconductor chip and a wettable attractor element are arranged. A medium including pigments at least regionally covers the exposed region of the substrate that is not covered by the semiconductor chip and the attractor element. The medium at least partly wets the semiconductor chip and the attractor element.Type: ApplicationFiled: June 27, 2012Publication date: July 10, 2014Applicant: OSRAM OPTO SEMICONDUCTORS GMBHInventors: Simon Jerebic, Erik Heinemann, Markus Pindl, Michael Bestele, Jan Marfeld
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Publication number: 20130181247Abstract: A semiconductor component includes at least one optoelectronic semiconductor chip and a connecting carrier having a connecting surface on which the semiconductor chip is disposed. A reflective coating and a limiting structure are formed on the connecting carrier. The limiting structure at least partially encloses the semiconductor chip in the lateral direction, and the reflective coating at least partially extends in the lateral direction between a side surface of the semiconductor chip and the limiting structure.Type: ApplicationFiled: July 1, 2011Publication date: July 18, 2013Applicant: OSRAM OPTO SEMICONDUCTORS GMBHInventors: Simon Jerebic, Erik Heinemann, Christian Gaertner, Ales Markytan
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Patent number: 7902683Abstract: A semiconductor arrangement having at least one semiconductor chip, which has, on one surface, an integrated circuit and at least one contact element which is electrically conductively connected to the latter, and having an edge protector, which at least partially covers an edge region on the surface of the semiconductor, the edge region extending along outer edges of the semiconductor chip. A method for manufacturing the above-mentioned semiconductor arrangement.Type: GrantFiled: March 23, 2006Date of Patent: March 8, 2011Assignee: Infineon Technologies AGInventors: Frank Pueschner, Erik Heinemann, Stephan Janka
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Publication number: 20100142882Abstract: An optoelectronic surface-mounted device is provided comprising a premolded casing having a first cavity and a second cavity and a leadframe to which a first electrooptical element and a second electrooptical element are mounted. The leadframe is embedded in the premolded casing. The first cavity is adapted for providing a first electromagnetic radiation path between a first waveguide and the first electrooptical element, wherein the second cavity is adapted for providing a second electromagnetic radiation path between a second waveguide and the second electrooptical element. The first cavity and the second cavity are formed in the premolded casing to decouple electromagnetic radiation propagating along the first electromagnetic radiation path from electromagnetic radiation propagating along the second electromagnetic radiation path.Type: ApplicationFiled: December 5, 2008Publication date: June 10, 2010Applicant: Avago Technologies Fiber IP (Singapore) Pte. Ltd.Inventors: Erik Heinemann, Cyrus Ghahremani, Tobias Staber
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Patent number: 7731433Abstract: An optoelectronic surface-mounted device is provided comprising a premolded casing having a first cavity and a second cavity and a leadframe to which a first electrooptical element and a second electrooptical element are mounted. The leadframe is embedded in the premolded casing. The first cavity is adapted for providing a first electromagnetic radiation path between a first waveguide and the first electrooptical element, wherein the second cavity is adapted for providing a second electromagnetic radiation path between a second waveguide and the second electrooptical element. The first cavity and the second cavity are formed in the premolded casing to decouple electromagnetic radiation propagating along the first electromagnetic radiation path from electromagnetic radiation propagating along the second electromagnetic radiation path.Type: GrantFiled: December 5, 2008Date of Patent: June 8, 2010Assignee: Avago Technologies Fiber IP (Singapore) Pte. Ltd.Inventors: Erik Heinemann, Cyrus Ghahremani, Tobias Stäber
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Patent number: 7605453Abstract: A chip module and to a chip card with a chip module which can be bent in such a way that a cross-sectional area runs along the greatest curvature of the bending line and parallel to one side of the chip module or the chip card. The module comprises contact areas within a surrounding line which are arranged in a plane perpendicular to the cross-sectional area, the surrounding line comprising a first line portion, which is adjacent the cross-sectional area, and a second line portion, which is opposite the first line portion. Furthermore, the module comprises a component, which is positioned in such a way that a first distance between the component and the first line portion is greater than a second distance between the component and the second line portion.Type: GrantFiled: August 11, 2006Date of Patent: October 20, 2009Assignee: Infineon Technologies AGInventors: Peter Stampka, Frank Puschner, Erik Heinemann, Birgit Binder
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Publication number: 20080205012Abstract: A chip card module including a substrate and also conductor patterns, which are applied on at least one side of the substrate without any adhesive. A chip is arranged on one side of the substrate and connected in an electrically conducting manner to the conductor patterns. A mold cap encapsulates at least part of the chip and of the conductor patterns. The method of producing such a chip card module includes providing a substrate, applying conductor patterns to at least one side of the substrate without any adhesive, mounting a chip on one side of the substrate, connecting the chip to the conductor patterns, and applying a molding compound on the substrate, so that at least part of the chip and of the conductor patterns is covered.Type: ApplicationFiled: December 21, 2007Publication date: August 28, 2008Applicant: Infineon Technologies AGInventors: ERIK HEINEMANN, Andreas Mueller-Hipper, Frank Pueschner, Thomas Spoetti
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Publication number: 20070034999Abstract: A chip module and to a chip card with a chip module which can be bent in such a way that a cross-sectional area runs along the greatest curvature of the bending line and parallel to one side of the chip module or the chip card. The module comprises contact areas within a surrounding line which are arranged in a plane perpendicular to the cross-sectional area, the surrounding line comprising a first line portion, which is adjacent the cross-sectional area, and a second line portion, which is opposite the first line portion. Furthermore, the module comprises a component, which is positioned in such a way that a first distance between the component and the first line portion is greater than a second distance between the component and the second line portion.Type: ApplicationFiled: August 11, 2006Publication date: February 15, 2007Applicant: INFINEON TECHNOLOGIES AGInventors: Peter Stampka, Frank Puschner, Erik Heinemann, Birgit Binder
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Publication number: 20060278958Abstract: A semiconductor arrangement having at least one semiconductor chip, which has, on one surface, an integrated circuit and at least one contact element which is electrically conductively connected to the latter, and having an edge protector, which at least partially covers an edge region on the surface of the semiconductor, the edge region extending along outer edges of the semiconductor chip. A method for manufacturing the above-mentioned semiconductor arrangement.Type: ApplicationFiled: March 23, 2006Publication date: December 14, 2006Applicant: Infineon Technologies AGInventors: Frank Pueschner, Erik Heinemann, Stephan Janka
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Patent number: 7069652Abstract: A smart card is laminated from at least two layers of paper or film as a mounting material. A first of the layers is fitted with a semiconductor chip and a second layer has connecting contacts as well as conductor tracks or external connecting surfaces. The contacts of the semiconductor chips are electrically conductively connected to the connecting contacts on the second layer. No chip modules are required to produce the smart cards. The mounting materials provided with ICs and contacts can be laminated in an endless roll format, in the same way as for paper production.Type: GrantFiled: October 4, 2002Date of Patent: July 4, 2006Assignee: Infineon Technologies AGInventors: Erik Heinemann, Frank Püschner
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Patent number: 7019981Abstract: A chip card having a chip card body, a semiconductor chip and a carrier substrate, the carrier substrate being provided on both sides with surface contacts and with contact-hole lines electrically connecting the upper and lower surface contacts to one another. The contact-hole lines are arranged so close to the edge of the carrier substrate that their lower ends open out into a base of an outer cavity, where they are closed off, to thereby prevent moisture from penetrating into the inner cavity, in which the semiconductor chip is located, without it being necessary to produce a dedicated cover for the contact-hole lines.Type: GrantFiled: January 21, 2004Date of Patent: March 28, 2006Assignee: Infineon Technologies AGInventors: Erik Heinemann, Frank Pueschner
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Patent number: 6992898Abstract: A smart-card module is described which has a substrate film of an anisotropically conductive material and at least one semiconductor chip. The semiconductor chip has connection points. On one surface of the semiconductor film, contact areas are applied directly. The substrate film is disposed between the semiconductor chip and the contact areas in such a way that it connects the connection points of the semiconductor chip to the contact areas in a manner of a direct contact.Type: GrantFiled: June 3, 2002Date of Patent: January 31, 2006Assignee: Infineon Technologies AGInventors: Erik Heinemann, Frank Püschner, Detlef Houdeau
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Publication number: 20040256150Abstract: A nonconducting substrate forming a strip or a panel on which a plurality of carrier elements having respective boundary lines are formed. The substrate includes a contact side, an insertion side opposite the contact side, and a conducting insertion-side metallization provided on the insertion side. The insertion-side metallization is formed such that an electrical connection can take place by flip-chip bonding between contact points of an integrated circuit to be applied to the insertion side and the insertion-side metallization.Type: ApplicationFiled: March 16, 2004Publication date: December 23, 2004Applicant: Infineon Technologies AGInventors: Bernd Barchmann, Erik Heinemann, Josef Heitzer, Frank Puschner
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Patent number: 6806562Abstract: A device having a semiconductor component and a printed circuit board are described. The semiconductor component has external contacts and the printed circuit board has contact terminals. The contact terminals display a central blind opening, into which the external contacts of the semiconductor component protrude and are in a force-locking engagement with the contact terminal areas. In the method of electromechanically connecting the two parts to form a device, after they have been aligned, the two components are merely pressed onto each other.Type: GrantFiled: January 25, 2002Date of Patent: October 19, 2004Assignee: Infineon Technologies AGInventors: Bernd Barchmann, Erik Heinemann, Josef Heitzer, Frank Pueschner
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Publication number: 20040150962Abstract: A chip card having a chip card body, a semiconductor chip and a carrier substrate, the carrier substrate being provided on both sides with surface contacts and with contact-hole lines electrically connecting the upper and lower surface contacts to one another. The contact-hole lines are arranged so close to the edge of the carrier substrate that their lower ends open out into a base of an outer cavity, where they are closed off, to thereby prevent moisture from penetrating into the inner cavity, in which the semiconductor chip is located, without it being necessary to produce a dedicated cover for the contact-hole lines.Type: ApplicationFiled: January 21, 2004Publication date: August 5, 2004Applicant: Infineon Technologies AGInventors: Erik Heinemann, Frank Pueschner
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Patent number: 6557769Abstract: Flip-chip bumps (solder bumps) are applied on the contact-connection points of a semiconductor chip. These bumps extend from there through a covering compound (mold) that is applied as a protective layer. The end of each one of the bumps that is remote from the semiconductor chip forms a pad. This pad lies approximately plane-parallel in the surface of the covering compound that is remote from the semiconductor chip. At least during the encapsulation process, the chips are preferably arranged on a carrier element, in particular a carrier strip.Type: GrantFiled: February 26, 2002Date of Patent: May 6, 2003Assignee: Infineon Technologies AGInventors: Frank Püschner, Erik Heinemann, Jürgen Fischer
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Publication number: 20030064544Abstract: A smart card is laminated from at least two layers of paper or film as a mounting material. A first of the layers is fitted with a semiconductor chip and a second layer has connecting contacts as well as conductor tracks or external connecting surfaces. The contacts of the semiconductor chips are electrically conductively connected to the connecting contacts on the second layer. No chip modules are required to produce the smart cards. The mounting materials provided with ICs and contacts can be laminated in an endless roll format, in the same way as for paper production.Type: ApplicationFiled: October 4, 2002Publication date: April 3, 2003Inventors: Erik Heinemann, Frank Puschner
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Publication number: 20020172018Abstract: A smart-card module is described which has a substrate film of an anisotropically conductive material and at least one semiconductor chip. The semiconductor chip has connection points. On one surface of the semiconductor film, contact areas are applied directly. The substrate film is disposed between the semiconductor chip and the contact areas in such a way that it connects the connection points of the semiconductor chip to the contact areas in a manner of a direct contact.Type: ApplicationFiled: June 3, 2002Publication date: November 21, 2002Inventors: Erik Heinemann, Frank Puschner, Detlef Houdeau