Abstract: The present invention relates to an arrangement for writing identical data into a first and a second memory field in a real-time computer which, while in operation, performs relocation of data from the first memory field to the second wherein the data memory is so arranged that, in response to a write pulse, data is transferred to a memory position defined by simultaneously received address information, the arrangement includes in addition to the normal address register required for writing data into the memory, an additional register for storing the address separation between the two memory fields as well as further means for writing the data sequentially into, on the one hand, a memory location defined by an address stored in the address register and, on the other hand, in a memory location defined by the sum of such stored address and the address separation stored in the additional register.