Patents by Inventor Erik Johan Norberg

Erik Johan Norberg has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20240142700
    Abstract: A device comprises a substrate having lower and upper silicon layers separated by a lower dielectric layer and a III-V structure bonded to the substrate, with first, second, and third sections along an optical axis. The first section comprises a first upper waveguide segment of the upper silicon layer, increasing in width from a first width to a second width at an interface between the first and second sections, the III-V structure overlapping with a tapered portion of the first upper waveguide segment. The second section comprises a second upper waveguide segment of the upper silicon layer decreasing in width, and a first lower waveguide segment of the lower silicon layer wider than the second upper waveguide segment at the interface between the second and third sections. The third section comprises a second lower waveguide segment of the lower silicon layer.
    Type: Application
    Filed: October 30, 2023
    Publication date: May 2, 2024
    Inventors: Han Yun, Erik Johan Norberg, John Parker
  • Publication number: 20230361532
    Abstract: A hybrid distributed feedback (DFB) laser formed from III-V and silicon materials can include a grating in the III-V material to provide optical feedback for mode selection. The grating can include a shift feature in a middle or other parts of the grating to change light output from the gain region. The grating can be a top-surface grating or regrowth can be applied to the III-V structure, which can then be bonded to a silicon structure to couple DFB laser light from the III-V structure to one or more silicon waveguides in the silicon structure.
    Type: Application
    Filed: May 4, 2022
    Publication date: November 9, 2023
    Inventors: Hanxing Shi, Antonio Labaro, Erik Johan Norberg, Han Yun
  • Patent number: 11791341
    Abstract: In radio-frequency (RF) devices integrated on semiconductor-on-insulator (e.g., silicon-based) substrates, RF losses may be reduced by increasing the resistivity of the semiconductor device layer in the vicinity of (e.g., underneath and/or in whole or in part surrounding) the metallization structures of the RF device, such as, e.g., transmission lines, contacts, or bonding pads. Increased resistivity can be achieved, e.g., by ion-implantation, or by patterning the device layer to create disconnected semiconductor islands.
    Type: Grant
    Filed: September 16, 2021
    Date of Patent: October 17, 2023
    Assignee: OpenLight Photonics, Inc.
    Inventors: John Sonkoly, Erik Johan Norberg
  • Patent number: 11700077
    Abstract: Described herein are photonic integrated circuits (PICs) comprising a semiconductor optical amplifier (SOA) to output a signal comprising a plurality of wavelengths, a sensor to detect data associated with a power value of each wavelength of the output signal of the SOA, a filter to filter power values of one or more of the wavelengths of the output signal of the SOA, and control circuitry to control the filter to reduce a difference between a pre-determined power value of each filtered wavelength of the output signal of the SOA and the detected power value of each filtered wavelength of the output signal of the SOA.
    Type: Grant
    Filed: January 5, 2021
    Date of Patent: July 11, 2023
    Assignee: OpenLight Photonics, Inc.
    Inventors: Erik Johan Norberg, John M. Garcia, Brian Robert Koch, Gregory Alan Fish
  • Patent number: 11698486
    Abstract: Described are various configurations of optical structures having asymmetric-width waveguides. A photodetector can include parallel waveguides that have different widths, which can be connected via passive waveguide. One or more light absorbing regions can be proximate to the waveguides to absorb light propagating through one or more of the parallel waveguides. Multiple photodetectors having asymmetric width waveguides can operate to transduce light in different modes in a polarization diversity optical receiver.
    Type: Grant
    Filed: June 29, 2022
    Date of Patent: July 11, 2023
    Assignee: OpenLight Photonics, Inc.
    Inventors: Jonathan Edgar Roth, Jared Bauters, Erik Johan Norberg
  • Publication number: 20230003926
    Abstract: A photonic integrated circuit device can comprise one or more layers having different refraction indices that cause optical coupling issues and losses from layer variations. A film of material can be applied to a layer of the photonic integrated circuit to avoid the issues to increase the optical bandwidth of the photonic integrated circuit device and decrease sensitivity to manufacturing and design processes.
    Type: Application
    Filed: June 30, 2021
    Publication date: January 5, 2023
    Inventors: Jared Bauters, Gregory Alan Fish, Erik Johan Norberg
  • Publication number: 20220393047
    Abstract: Embodiments of the invention describe apparatuses, optical systems, and methods related to utilizing optical cladding layers. According to one embodiment, a hybrid optical device includes a silicon semiconductor layer and a III-V semiconductor layer having an overlapping region, wherein a majority of a field of an optical mode in the overlapping region is to be contained in the III-V semiconductor layer. A cladding region between the silicon semiconductor layer and the III-V semiconductor layer has a spatial property to substantially confine the optical mode to the III-V semiconductor layer and enable heat dissipation through the silicon semiconductor layer.
    Type: Application
    Filed: August 17, 2022
    Publication date: December 8, 2022
    Inventors: Erik Johan Norberg, Anand Ramaswamy, Brian Robert Koch
  • Publication number: 20220326437
    Abstract: Described are various configurations of optical structures having asymmetric-width waveguides. A photodetector can include parallel waveguides that have different widths, which can be connected via passive waveguide. One or more light absorbing regions can be proximate to the waveguides to absorb light propagating through one or more of the parallel waveguides. Multiple photodetectors having asymmetric width waveguides can operate to transduce light in different modes in a polarization diversity optical receiver.
    Type: Application
    Filed: June 29, 2022
    Publication date: October 13, 2022
    Inventors: Jonathan Edgar Roth, Jared Bauters, Erik Johan Norberg
  • Patent number: 11437786
    Abstract: Embodiments of the invention describe polarization insensitive optical devices utilizing polarization sensitive components. Light comprising at least one polarization state is received, and embodiments of the invention select a first optical path for light comprising a first polarization state or a second optical path for light comprising a second polarization state orthogonal to the first polarization state. The optical paths include components to at least amplify and/or modulate light comprising the first polarization state; the second optical path includes a polarization rotator to rotate light comprising the second polarization state to the first polarization state.
    Type: Grant
    Filed: July 28, 2020
    Date of Patent: September 6, 2022
    Assignee: OpenLight Photonics, Inc.
    Inventors: Gregory Alan Fish, Erik Johan Norberg, John M. Garcia, Robert Silvio Guzzon, Daniel Knight Sparacin
  • Patent number: 11428646
    Abstract: Optical fabrication monitor structures can be included in a design fabricated on a wafer from a mask or fabrication reticle. A first set of components can be formed in an initial fabrication cycle, where the first set includes functional components and monitor structures. A second set of components can be formed by subsequent fabrication processes that can potentially cause errors or damage to the first set of components. The monitor structures can be implemented during fabrication (e.g., in a cleanroom) to detect fabrication errors without pulling or scrapping the wafer.
    Type: Grant
    Filed: August 28, 2020
    Date of Patent: August 30, 2022
    Assignee: OpenLight Photonics, Inc.
    Inventors: Erik Johan Norberg, Rui Liang, Benjamin M. Curtin, Jared Bauters
  • Patent number: 11430901
    Abstract: Embodiments of the invention describe apparatuses, optical systems, and methods related to utilizing optical cladding layers. According to one embodiment, a hybrid optical device includes a silicon semiconductor layer and a III-V semiconductor layer having an overlapping region, wherein a majority of a field of an optical mode in the overlapping region is to be contained in the III-V semiconductor layer. A cladding region between the silicon semiconductor layer and the III-V semiconductor layer has a spatial property to substantially confine the optical mode to the III-V semiconductor layer and enable heat dissipation through the silicon semiconductor layer.
    Type: Grant
    Filed: October 7, 2020
    Date of Patent: August 30, 2022
    Assignee: OpenLight Photonics, Inc.
    Inventors: Erik Johan Norberg, Anand Ramaswamy, Brian Robert Koch
  • Patent number: 11402575
    Abstract: Described are various configurations of optical structures having asymmetric-width waveguides. A photodetector can include parallel waveguides that have different widths, which can be connected via passive waveguide. One or more light absorbing regions can be proximate to the waveguides to absorb light propagating through one or more of the parallel waveguides. Multiple photodetectors having asymmetric width waveguides can operate to transduce light in different modes in a polarization diversity optical receiver.
    Type: Grant
    Filed: September 25, 2020
    Date of Patent: August 2, 2022
    Assignee: Aurrion, Inc.
    Inventors: Jonathan Edgar Roth, Jared Bauters, Erik Johan Norberg
  • Publication number: 20220065798
    Abstract: Optical fabrication monitor structures can be included in a design fabricated on a wafer from a mask or fabrication reticle. A first set of components can be formed in an initial fabrication cycle, where the first set includes functional components and monitor structures. A second set of components can be formed by subsequent fabrication processes that can potentially cause errors or damage to the first set of components. The monitor structures can be implemented during fabrication (e.g., in a cleanroom) to detect fabrication errors without pulling or scrapping the wafer.
    Type: Application
    Filed: August 28, 2020
    Publication date: March 3, 2022
    Inventors: Erik Johan Norberg, Rui Liang, Benjamin M. Curtin, Jared Bauters
  • Publication number: 20220005832
    Abstract: In radio-frequency (RF) devices integrated on semiconductor-on-insulator (e.g., silicon-based) substrates, RF losses may be reduced by increasing the resistivity of the semiconductor device layer in the vicinity of (e.g., underneath and/or in whole or in part surrounding) the metallization structures of the RF device, such as, e.g., transmission lines, contacts, or bonding pads. Increased resistivity can be achieved, e.g., by ion-implantation, or by patterning the device layer to create disconnected semiconductor islands.
    Type: Application
    Filed: September 16, 2021
    Publication date: January 6, 2022
    Inventors: John Sonkoly, Erik Johan Norberg
  • Patent number: 11215758
    Abstract: A fabrication-tolerant non-linear waveguide taper for a waveguide transition can be designed by computing the scattering rate associated with the waveguide transition as a function of waveguide width of the waveguide taper for each of multiple sets of parameter values characterizing the waveguide transition (e.g., a set of nominal parameter values and sets of parameter values associated with process corners representing process variations from the nominal parameter values), determining an envelope of the computed width-dependent scattering rates, and computing a non-linear taper profile of the waveguide taper based on the envelope.
    Type: Grant
    Filed: September 16, 2020
    Date of Patent: January 4, 2022
    Assignee: Juniper Networks, Inc.
    Inventors: Naser Dalvand, Erik Johan Norberg
  • Publication number: 20210343745
    Abstract: In radio-frequency (RF) devices integrated on semiconductor-on-insulator (e.g., silicon-based) substrates, RF losses may be reduced by increasing the resistivity of the semiconductor device layer in the vicinity of (e.g., underneath and/or in whole or in part surrounding) the metallization structures of the RF device, such as, e.g., transmission lines, contacts, or bonding pads. Increased resistivity can be achieved, e.g., by ion-implantation, or by patterning the device layer to create disconnected semiconductor islands.
    Type: Application
    Filed: April 30, 2020
    Publication date: November 4, 2021
    Inventors: John Sonkoly, Erik Johan Norberg
  • Patent number: 11164893
    Abstract: In radio-frequency (RF) devices integrated on semiconductor-on-insulator (e.g., silicon-based) substrates, RF losses may be reduced by increasing the resistivity of the semiconductor device layer in the vicinity of (e.g., underneath and/or in whole or in part surrounding) the metallization structures of the RF device, such as, e.g., transmission lines, contacts, or bonding pads. Increased resistivity can be achieved, e.g., by ion-implantation, or by patterning the device layer to create disconnected semiconductor islands.
    Type: Grant
    Filed: April 30, 2020
    Date of Patent: November 2, 2021
    Assignee: Juniper Networks, Inc.
    Inventors: John Sonkoly, Erik Johan Norberg
  • Patent number: 11106060
    Abstract: Disclosed are structures as well as methods of manufacture and operation of integrated optoelectronic devices that facilitate directly heating the diode or waveguide structures to regulate a temperature of the device while allowing electrical contacts to be placed close to the device to reduce the electrical resistance. Embodiments include, in particular, heterogeneous electro-absorption modulators that include a compound-semiconductor diode structure placed above a waveguide formed in the device layer of an SOI substrate.
    Type: Grant
    Filed: July 2, 2020
    Date of Patent: August 31, 2021
    Assignee: Juniper Networks, Inc.
    Inventors: Jonathan Edgar Roth, Erik Johan Norberg
  • Publication number: 20210225732
    Abstract: The thermal impedance of p-i-n diodes integrated on semiconductor-on-insulator substrates can be reduced with thermally conducting vias that shunt heat across thermal barriers such as, e.g., the thick top oxide cladding often encapsulating the p-i-n diode. In various embodiments, one or more thermally conducting vias extend from a top surface of the intrinsic diode layer to a metal structure connected to the doped top layer of the diode, and/or from that metal structure down to at least the semiconductor device layer of the substrate.
    Type: Application
    Filed: April 6, 2021
    Publication date: July 22, 2021
    Inventors: Erik Johan Norberg, Naser Dalvand, Gregory Alan Fish
  • Patent number: 10998252
    Abstract: The thermal impedance of p-i-n diodes integrated on semiconductor-on-insulator substrates can be reduced with thermally conducting vias that shunt heat across thermal barriers such as, e.g., the thick top oxide cladding often encapsulating the p-i-n diode. In various embodiments, one or more thermally conducting vias extend from a top surface of the intrinsic diode layer to a metal structure connected to the doped top layer of the diode, and/or from that metal structure down to at least the semiconductor device layer of the substrate.
    Type: Grant
    Filed: February 14, 2020
    Date of Patent: May 4, 2021
    Assignee: Juniper Networks, Inc.
    Inventors: Erik Johan Norberg, Naser Dalvand, Gregory Alan Fish