Abstract: The invention relates to a compound of formula (I) or a pharmaceutically acceptable salt thereof, wherein n, R1, R2, R3, R4 and R5 are as defined in the description and in the claims. The compound of formula (I) can be used as a medicament.

Abstract: An imaging system includes an imaging device having a holder configured to hold a cell culture plate with a plurality of wells. The imaging device also includes an imaging assembly having a plurality of imaging units, each of which is configured to image one well of the plurality of wells. The imaging system also includes a storage platform in communication with the imaging device configured to receive a plurality of images from the imaging device. The system further includes a computer in communication with the imaging device and the storage platform. The computer is configured to control the imaging device and to display at least one image of the plurality of images.

Abstract: The present invention relates to agents for use in the treatment of glioma, in particular astrocytoma WHO II° and III°, as well as IV° (glioblastoma), in a subject.

Abstract: The present invention relates to agents for use in the treatment of glioma, in particular astrocytoma WHO I? and 111°, as well as IV0 (glioblastoma), in a subject.

Abstract: The present invention relates to agents for use in the treatment of glioma, in particular astrocytoma WHO IF and 111°, as well as IV0 (glioblastoma), in a subject.

Abstract: A method for fabricating a photoelectric array device with an optical micro lens array (10) using a plurality of photovoltaic dies (12) so a lens (14) is aligned to each die (12) in the array device. A back surface (16) of a lens array substrate (10) is metallized with electrical conducting lines and interconnects (18). Fabricated photovoltaic dies are aligned to an alignment substrate using a fluidic capillary-driven alignment process. The plurality of aligned dies (12) is attached mechanically and electrically to the metallized lens array substrate (10), so the each die (12) aligns with a lens (14) in the lens array substrate (10). The alignment substrate is removed from the dies (12) attached to the lens array substrate (10). A back panel substrate (22) is coupled mechanically and electrically to the plurality of dies (12) attached to the lens array substrate (10).

Abstract: An electronic circuit arrangement includes a heat sink and a first circuit carrier which is thermally coupled to the heat sink, lies flat on the latter and is intended to wire electronic components of the circuit arrangement. Provided for at least one electronic component is a special arrangement which is associated with a considerably increased heat dissipation capability for the relevant component and, in addition, also affords further advantages in connection with changes in the population and/or line routing which might occur in practice. The important factor for this is that the component is arranged under a second circuit carrier which is held in a recess in the first circuit carrier. The recess passes through to the top side of the heat sink.

Abstract: An electronic circuit arrangement includes a heat sink and a first circuit carrier which is thermally coupled to the heat sink, lies flat on the latter and is intended to wire electronic components of the circuit arrangement. Provided for at least one electronic component is a special arrangement which is associated with a considerably increased heat dissipation capability for the relevant component and, in addition, also affords further advantages in connection with changes in the population and/or line routing which might occur in practice. The important factor for this is that the component is arranged under a second circuit carrier which is held in a recess in the first circuit carrier. The recess passes through to the top side of the heat sink.

Abstract: A method for producing encapsulated chips includes preparing a wafer with contacts projecting from a surface of the wafer. The wafer is disposed on a dicing substrate and diced into a plurality of spaced chips on the dicing substrate. The contacts are covered with a protection arrangement, then injection molding being conducted to introduce encapsulation material into the contacts and the trenches. Then the protection arrangement is removed so that the contacts are exposed.

Abstract: A method for producing encapsulated chips includes preparing a wafer with contacts projecting from a surface of the wafer. The wafer is disposed on a dicing substrate and diced into a plurality of spaced chips on the dicing substrate. The contacts are covered with a protection arrangement, then injection molding being conducted to introduce encapsulation material into the contacts and the trenches. Then the protection arrangement is removed so that the contacts are exposed.

Abstract: A substrate (10, 80) includes a conductive layer (16, 82) which is non-wettable by solder. A solder receiving stud (22, 84) is formed on the conductive layer, preferably by plating. If used for transferring solder, a solder bump (32) is selectively formed on the solder receiving stud since the surrounding conductive layer is not wettable by the solder. A receiving substrate, such as a semiconductor device (100), is aligned with the substrate. The solder bump is heated to a liquidus state and the solder bump makes physical contact with a solder accepting stud (120) of the receiving substrate. Because the area of the solder accepting stud is larger than the area of the corresponding stud on the transfer substrate, the majority of the solder will transfer to the receiving substrate upon separation. Alternatively, the device could itself already have bumps formed thereon, in which case an unbumped substrate is used to test the device, and solder remains on the device upon separation.