Abstract: A method for manufacturing an array of double-crown-shaped storage capacitors with increased capacitance on a dynamic random access memory (DRAM) device has been achieved. The invention utilizes a polysilicon and silicon nitride spacer to form the double-crown capacitors while forming concurrently bit lines and node contacts for the bottom electrodes of the storage capacitors. A silicon nitride layer and a silicon nitride spacer are used to insulate the bit lines from the capacitors formed thereon. The polysilicon sidewall spacer is used to pattern a very narrow vertical insulating structure on which is formed the polysilicon double crown by depositing another polysilicon layer which is etched back. The vertical insulating structures are removed by selective etching leaving a free-standing bottom electrode having a double-crown-shaped structure. An interelectrode dielectric layer having a high dielectric constant, and a final polysilicon layer are deposited to complete the storage capacitors for the DRAM.