Abstract: An integrated state vector management system for control systems includes a plurality of co-processors configured to generate and utilize state vector data. The integrated state vector management system further includes state vector module communicatively connected to each of the plurality of co-processors. The state vector module includes a state vector memory containing at least three memory buffers for storing three datasets of state vector data. The state vector module further includes a state vector memory control logic communicatively coupled to the state vector memory. The state vector control logic is configured to provide read and write control to the state vector memory. The state vector memory control logic includes at least a write pointer controller and a read pointer controller.

Abstract: A multi-processor computer system with shared memory resources includes a first plurality of sensors configured to acquire inertial and positional data related to a mobile platform. The system further includes a first plurality of co-processors having a hardware logic configured to control the acquisition of the inertial and positional data and configured to analyze the acquired data. The system also includes a second plurality of sensors configured to acquire input data related to the mobile platform connected to a second plurality of co-processors having a hardware logic configured to receive a plurality of streams of input data from the second plurality of sensors and configured to segment the input data into a plurality of discrete data segments. The system also includes a plurality of hardware processing units configured to perform calculations related to the input data using the plurality of data segments.

Abstract: A system for managing internal-computer system communications including a processor, an SPI controller, an interconnector, and an SPI cluster containing multiple SPI interfaces, with the SPI interfaces being connected to one or more devices in the computer system or environment. The SPI cluster includes SPI interfaces that can convert communications to/from a plurality of device's formats to serialized digital formats suitable for ingest and actuation for the SPI controllers. The interconnector may use a differentially, optically, galvanometrically, inductively coupled driven wire and to enable communications between the SPI cluster constituents and the SPI controller. The SPI controller manages communications to the SPI interfaces that act as coordinated intermediates for device control and communications, thus insulating the computer system's processor from the increased workload of managing all internal system communications.

Abstract: A computer system for processing machine vision data and performing active control of a mobile platform includes a plurality of sensors configured to acquire inertial and positional data. The system further includes a first plurality of co-processors having a hardware logic configured to control the acquisition of the inertial data. A second plurality of sensors is configured to acquire image data related to the mobile platform. The system further includes a second plurality of co-processors having a hardware logic configured to control the acquisition of the image data. The system further includes state management logic to perform state management operations for the acquired inertial and positional data in a computer-readable memory. The state management is performed using a state vector. The state management logic coordinates sharing and updating the acquired machine vision data in a parallel fashion between the first and second co-processors.

Abstract: A multi-processor computer system with shared memory resources includes a first plurality of sensors configured to acquire inertial and positional data related to a mobile platform. The system further includes a first plurality of co-processors having a hardware logic configured to control the acquisition of the inertial and positional data and configured to analyze the acquired data. The system also includes a second plurality of sensors configured to acquire input data related to the mobile platform connected to a second plurality of co-processors having a hardware logic configured to receive a plurality of streams of input data from the second plurality of sensors and configured to segment the input data into a plurality of discrete data segments. The system also includes a plurality of hardware processing units configured to perform calculations related to the input data using the plurality of data segments.

Abstract: A computer system for processing machine vision data and performing active control of a mobile platform includes a plurality of sensors configured to acquire inertial and positional data. The system further includes a first plurality of co-processors having a hardware logic configured to control the acquisition of the inertial data. A second plurality of sensors is configured to acquire image data related to the mobile platform. The system further includes a second plurality of co-processors having a hardware logic configured to control the acquisition of the image data. The system further includes state management logic to perform state management operations for the acquired inertial and positional data in a computer-readable memory. The state management is performed using a state vector. The state management logic coordinates sharing and updating the acquired machine vision data in a parallel fashion between the first and second co-processors.

Abstract: An integrated state vector management system for control systems includes a plurality of co-processors configured to generate and utilize state vector data. The integrated state vector management system further includes state vector module communicatively connected to each of the plurality of co-processors. The state vector module includes a state vector memory containing at least three memory buffers for storing three datasets of state vector data. The state vector module further includes a state vector memory control logic communicatively coupled to the state vector memory. The state vector control logic is configured to provide read and write control to the state vector memory. The state vector memory control logic includes at least a write pointer controller and a read pointer controller.

Abstract: An optical sensor includes an array of pixels configured to convert photons into electrons for forming an image or to measure spectral content without forming an image. A filter assembly is operatively associated with the array of pixels for passing predetermined bandwidths of photons to the array of pixels. A mask is operatively associated with the array of pixels and the filter assembly. The mask includes a plurality of apertures each for limiting photons passing through the filter assembly to a respective pixel in the array of pixels.

Abstract: A motor-based position system includes one or more motors having a rotor. The system further includes a motor controller. The motor controller is communicatively coupled to each of the motors. The system further includes one or more encoders configured to detect an absolute position of each motor and one or more devices configured to collect inertial data. The system further includes a processing device coupled to the motor controller, one or more encoders and one or more devices. The processing device is configured to receive signals indicative of motors' absolute position from the encoders and configured to convert the received encoder signals into a format understood by the motor controller. The processing device is further configured to send the converted signals to the motor controller with low latency and configured to combine the received encoder signals with the inertial data to generate more accurate positional information.

Abstract: An optical sensor includes an array of pixels configured to convert photons into electrons for forming an image or to measure spectral content without forming an image. A filter assembly is operatively associated with the array of pixels for passing predetermined bandwidths of photons to the array of pixels. A mask is operatively associated with the array of pixels and the filter assembly. The mask includes a plurality of apertures each for limiting photons passing through the filter assembly to a respective pixel in the array of pixels.

Abstract: A system for managing internal-computer system communications including a processor, an SPI controller, an interconnector, and an SPI cluster containing multiple SPI interfaces, with the SPI interfaces being connected to one or more devices in the computer system or environment. The SPI cluster includes SPI interfaces that can convert communications to/from a plurality of device's formats to serialized digital formats suitable for ingest and actuation for the SPI controllers. The interconnector may use a differentially, optically, galvanometrically, inductively coupled driven wire and to enable communications between the SPI cluster constituents and the SPI controller. The SPI controller manages communications to the SPI interfaces that act as coordinated intermediates for device control and communications, thus insulating the computer system's processor from the increased workload of managing all internal system communications.

Abstract: The apparatus and method described herein detect fluorescence polarization (FP) during a nucleic acid reaction such as PCR amplification or isothermal amplification. Fluorescence polarization can be concurrently detected in multiple samples. In addition, multiple different fluorophores can be used for detect different sequences within a sample during the same reaction.