Patents by Inventor Erik W. Peter

Erik W. Peter has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20190172538
    Abstract: Methods and apparatuses for providing a hybrid memory module having both volatile and non-volatile memories to replace a DDR channel in a processing system.
    Type: Application
    Filed: October 26, 2018
    Publication date: June 6, 2019
    Inventors: Kumar K. Chinnaswamy, Randy B. OSBORNE, Erik W. Peter
  • Patent number: 10134471
    Abstract: Methods and apparatuses for providing a hybrid memory module having both volatile and non-volatile memories to replace a DDR channel in a processing system.
    Type: Grant
    Filed: November 12, 2014
    Date of Patent: November 20, 2018
    Assignee: Intel Corporation
    Inventors: Kumar K. Chinnaswamy, Randy B. Osborne, Erik W. Peter
  • Publication number: 20150143034
    Abstract: Methods and apparatuses for providing a hybrid memory module having both volatile and non-volatile memories to replace a DDR channel in a processing system.
    Type: Application
    Filed: November 12, 2014
    Publication date: May 21, 2015
    Inventors: Kumar K. Chinnaswamy, Randy B. Osborne, Erik W. Peter
  • Patent number: 8914568
    Abstract: Methods and apparatuses for providing a hybrid memory module having both volatile and non-volatile memories to replace a DDR channel in a processing system.
    Type: Grant
    Filed: December 23, 2009
    Date of Patent: December 16, 2014
    Assignee: Intel Corporation
    Inventors: Kumar K. Chinnaswamy, Randy B. Osborne, Erik W. Peter
  • Publication number: 20110153916
    Abstract: Methods and apparatuses for providing a hybrid memory module having both volatile and non-volatile memories to replace a DDR channel in a processing system.
    Type: Application
    Filed: December 23, 2009
    Publication date: June 23, 2011
    Inventors: Kumar K. Chinnaswamy, Randy B. Osborne, Erik W. Peter
  • Patent number: 7376854
    Abstract: In some embodiments, a method, apparatus and system for enabling and disabling voltage regulator controllers are generally presented. In this regard, a sequencer agent is introduced to selectively enable or disable the outputs of voltage regulator controllers in an electronic appliance based at least in part on settings stored in non-volatile memory. Other embodiments are discussed and claimed.
    Type: Grant
    Filed: March 31, 2004
    Date of Patent: May 20, 2008
    Assignee: Intel Corporation
    Inventors: Philip R. Lehwalder, Erik W. Peter
  • Patent number: 7028194
    Abstract: A technique usable with a computer includes in response to the computer being in a predetermined sleep state, coupling a load to conduct current from a supply voltage plane of the computer to ground. The supply voltage plane does not receive power from a power resource of the computer in response to the predetermined sleep state. In response to the computer being in a predetermined state other than the predetermined sleep state, the load is decoupled so that the load does not conduct current from the supply voltage plane to ground.
    Type: Grant
    Filed: June 7, 2001
    Date of Patent: April 11, 2006
    Assignee: Intel Corporation
    Inventors: Brian S. Forbes, Erik W. Peter, Jeffrey J. Berube, Charles M. Bailley
  • Publication number: 20040061241
    Abstract: A method and an apparatus for improving the delivery and filtering of power to a semiconductor device is disclosed by organizing out interconnects (pins, balls, pads or other interconnects) used to carry power in a striped configuration that shortens the conductive path required between a power source and a semiconductor device and that reduces the resistance of that conductive path.
    Type: Application
    Filed: September 30, 2002
    Publication date: April 1, 2004
    Inventors: Edward P. Osburn, Erik W. Peter, Timothy M. Gates
  • Publication number: 20020188876
    Abstract: A technique usable with a computer includes in response to the computer being in a predetermined sleep state, coupling a load to conduct current from a supply voltage plane of the computer to ground. The supply voltage plane does not receive power from a power resource of the computer in response to the predetermined sleep state. In response to the computer being in a predetermined state other than the predetermined sleep state, the load is decoupled so that the load does not conduct current from the supply voltage plane to ground.
    Type: Application
    Filed: June 7, 2001
    Publication date: December 12, 2002
    Inventors: Brian S. Forbes, Erik W. Peter, Jeffrey J. Berube, Charles M. Bailley
  • Patent number: 6477060
    Abstract: A printed circuit board utilizes asymmetric striplines to accommodate a large number of transmission lines on a six-layer board. The asymmetric striplines are formed from two signal layers that are sandwiched between two reference planes such that the traces in each signal layer form asymmetric striplines with the two reference planes. Two additional signal layers are arranged on the outside of the reference planes so as to form microstrips with the reference planes.
    Type: Grant
    Filed: June 30, 2000
    Date of Patent: November 5, 2002
    Assignee: Intel Corporation
    Inventors: Erik W. Peter, Jeffrey M. Shuey, Ronald Martin
  • Patent number: 6215662
    Abstract: The invention provides a printed circuit board that has electronic power switches. The switches include vertical heat conductive metal backings, for attaching heat sinks. Each heat sink includes a main panel and two flanking fin panels. The main panels are attached to the metal backings and are arranged vertically, such as according to the TO-220 methodology. The invention provides bringing the power switches close to each other, and interleaving the fins according to various configurations, pairs or chain. Openings in the fin panels become aligned with each other, permitting a stream of air to move through them.
    Type: Grant
    Filed: March 13, 2000
    Date of Patent: April 10, 2001
    Assignee: Intel Corporation
    Inventors: Erik W. Peter, Jeff J. Olsen