Patents by Inventor Erik Walles

Erik Walles has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 10217154
    Abstract: Disclosed in one embodiment is a method implemented in a computer system in which a customer reports physical characteristics, in which the customer is instructed how to perform measurements of the customer or in which a device measures the customer, in which the reported customer measurements are evaluated through use of a measurement model, in which a full set of measurements may not be required based on measurements already provided, and in which the reported customer measurements are evaluated for reliability. The method also scales the customer's measurements to a pattern, obtains the fulfilled pattern from vendors, and then fulfills the customer order.
    Type: Grant
    Filed: January 29, 2014
    Date of Patent: February 26, 2019
    Assignee: Indochino Apparel Inc.
    Inventors: Dennis Richard Rohm, Luke Bornn, Pavel Bakhilau, Erik Walle
  • Publication number: 20140214587
    Abstract: Disclosed in one embodiment is a method implemented in a computer system in which a customer reports physical characteristics, in which the customer is instructed how to perform measurements of the customer or in which a device measures the customer, in which the reported customer measurements are evaluated through use of a measurement model, in which a full set of measurements may not be required based on measurements already provided, and in which the reported customer measurements are evaluated for reliability. The method also scales the customer's measurements to a pattern, obtains the fulfilled pattern from vendors, and then fulfills the customer order.
    Type: Application
    Filed: January 29, 2014
    Publication date: July 31, 2014
    Applicant: Indochino Apparel Inc.
    Inventors: Dennis Richard ROHM, Luke BORNN, Pavel BAKHILAU, Erik WALLE
  • Patent number: 7035210
    Abstract: A node (20, 20-2) of a packet switching network has a chain of processing units (30) through which a media stream of packets is routed for sequentially processing of each packet of the media stream. Each of the plural processing units of the chain generates an intra-node performance monitoring packet, and sends the intra-node performance monitoring packet to a performance monitoring unit (40) situated at the node. Each intra-node performance monitoring packet includes an indication of time spent by the packet of the media stream in the respective processing unit. The performance monitoring unit provides an indication of delay in the node for the media stream, e.g., the delay experienced at each processing unit of the chain and the overall delay for a packet of the media stream through the plural processing units comprising the processing chain of the node.
    Type: Grant
    Filed: July 12, 2001
    Date of Patent: April 25, 2006
    Assignee: Telefonaktiebolaget LM Ericsson (publ)
    Inventor: Erik Walles
  • Patent number: 6940829
    Abstract: In a method of running a processor for high performance operation in a communication network one function of the processor is a calculation using an algorithm. The function can include calculation for each of a plurality channels. In situations, when there is not available processor capacity to perform the calculation function for each channel, the quality of the algorithm is degraded in a controlled manner to decrease the amount of necessary calculations so that more channels can be handled. The quality of the algorithm is degraded by dividing the algorithm into subfunctions and by performing only some of the subfunctions in said situations when momentary calculation peak exist.
    Type: Grant
    Filed: January 16, 2001
    Date of Patent: September 6, 2005
    Assignee: Telefonatiebolaget LM Ericsson (publ)
    Inventor: Erik Walles
  • Publication number: 20030012136
    Abstract: A node (20, 20-2) of a packet switching network has a chain of processing units (30) through which a media stream of packets is routed for sequentially processing of each packet of the media stream. Each of the plural processing units of the chain generates an intra-node performance monitoring packet, and sends the intra-node performance monitoring packet to a performance monitoring unit (40) situated at the node. Each intra-node performance monitoring packet includes an indication of time spent by the packet of the media stream in the respective processing unit. The performance monitoring unit provides an indication of delay in the node for the media stream, e.g., the delay experienced at each processing unit of the chain and the overall delay for a packet of the media stream through the plural processing units comprising the processing chain of the node.
    Type: Application
    Filed: July 12, 2001
    Publication date: January 16, 2003
    Inventor: Erik Walles
  • Publication number: 20020077809
    Abstract: In a method of running a processor for high performance operation in a communication network one function of the processor is a calculation using an algorithm. The function can include calculation for each of a plurality channels. In situations, when there is not available processor capacity to perform the calculation function for each channel, the quality of the algorithm is degraded in a controlled manner to decrease the amount of necessary calculations so that more channels can be handled. The quality of the algorithm is degraded by dividing the algorithm into subfunctions and by performing only some of the subfunctions in said situations when momentary calculation peak exist.
    Type: Application
    Filed: January 16, 2001
    Publication date: June 20, 2002
    Inventor: Erik Walles