Patents by Inventor Erika Lynn Mazotti
Erika Lynn Mazotti has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 11782102Abstract: A microelectronic device has a Hall sensor that includes a Hall plate in a semiconductor material. The Hall sensor includes contact regions in the semiconductor material, contacting the Hall plate. The Hall sensor includes an isolation structure with a dielectric material contacting the semiconductor material, on at least two opposite sides of each of the contact regions. The isolation structure is laterally separated from the contact regions by gaps. The Hall sensor further includes a conductive spacer over the gaps, the conductive spacer being separated from the semiconductor material by an insulating layer.Type: GrantFiled: October 22, 2021Date of Patent: October 10, 2023Assignee: TEXAS INSTRUMENTS INCORPORATEDInventors: Keith Ryan Green, Erika Lynn Mazotti, William David French, Ricky Alan Jackson
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Publication number: 20230129179Abstract: A microelectronic device has a Hall sensor that includes a Hall plate in a semiconductor material. The Hall sensor includes contact regions in the semiconductor material, contacting the Hall plate. The Hall sensor includes an isolation structure with a dielectric material contacting the semiconductor material, on at least two opposite sides of each of the contact regions. The isolation structure is laterally separated from the contact regions by gaps. The Hall sensor further includes a conductive spacer over the gaps, the conductive spacer being separated from the semiconductor material by an insulating layer.Type: ApplicationFiled: October 22, 2021Publication date: April 27, 2023Inventors: Keith Ryan Green, Erika Lynn Mazotti, William David French, Ricky Alan Jackson
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Publication number: 20230017047Abstract: An example apparatus includes a semiconductor wafer with a plurality of probe pads each formed centered in scribe streets and intersected by saw kerf lanes. Each probe pad includes a plurality of lower level conductor layers arranged in lower level conductor frames, a plurality of lower level vias extending vertically through lower level insulator layers and electrically coupling the lower level conductor frames; a plurality of upper level conductor layers, each forming two portions on two outer edges of the probe pad, the two portions aligned with, spaced from, and on opposite sides of the saw kerf lane, the coverage of the upper level conductor layers being less than about twenty percent; and a plurality of upper level vias extending vertically through upper level insulator layers and coupling the upper level conductor layers electrically to one another and to the lower level conductor layers. Methods are disclosed.Type: ApplicationFiled: September 26, 2022Publication date: January 19, 2023Inventors: Ricky Alan Jackson, Erika Lynn Mazotti, Sudtida Lavangkul
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Patent number: 11515266Abstract: An example apparatus includes a semiconductor wafer with a plurality of probe pads each formed centered in scribe streets and intersected by saw kerf lanes. Each probe pad includes a plurality of lower level conductor layers arranged in lower level conductor frames, a plurality of lower level vias extending vertically through lower level insulator layers and electrically coupling the lower level conductor frames; a plurality of upper level conductor layers, each forming two portions on two outer edges of the probe pad, the two portions aligned with, spaced from, and on opposite sides of the saw kerf lane, the coverage of the upper level conductor layers being less than about twenty percent; and a plurality of upper level vias extending vertically through upper level insulator layers and coupling the upper level conductor layers electrically to one another and to the lower level conductor layers. Methods are disclosed.Type: GrantFiled: September 3, 2020Date of Patent: November 29, 2022Assignee: TEXAS INSTRUMENTS INCORPORATEDInventors: Ricky Alan Jackson, Erika Lynn Mazotti, Sudtida Lavangkul
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Publication number: 20210343694Abstract: An electronic device, e.g. a trimmable resistor, includes a plurality of fused resistors, each fused resistor including one or more doped resistive regions formed in a semiconductor substrate. The doped resistive regions may be thermistors. Each fused resistor further includes a corresponding one of a plurality of fusible links. A first terminal of each of the fused resistors is connected to a first terminal of the corresponding fusible link. First and second interconnection buses are located over the substrate, with the first interconnection bus connecting to a second terminal of each of the fused resistors, and the second interconnection bus connecting to a second terminal of each of the fusible links. The plurality of fused resistors have resistance values that form an exponential progression.Type: ApplicationFiled: July 15, 2021Publication date: November 4, 2021Inventors: Steve Edward Harrell, Keith Eric Sanborn, Wai Lee, Erika Lynn Mazotti
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Patent number: 11101263Abstract: An electronic device, e.g. a trimmable resistor, includes a plurality of fused resistors, each fused resistor including one or more doped resistive regions formed in a semiconductor substrate. The doped resistive regions may be thermistors. Each fused resistor further includes a corresponding one of a plurality of fusible links. A first terminal of each of the fused resistors is connected to a first terminal of the corresponding fusible link. First and second interconnection buses are located over the substrate, with the first interconnection bus connecting to a second terminal of each of the fused resistors, and the second interconnection bus connecting to a second terminal of each of the fusible links. The plurality of fused resistors have resistance values that form an exponential progression.Type: GrantFiled: August 22, 2019Date of Patent: August 24, 2021Assignee: TEXAS INSTRUMENTS INCORPORATEDInventors: Steve Edward Harrell, Keith Eric Sanborn, Wai Lee, Erika Lynn Mazotti
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Publication number: 20210217706Abstract: An example apparatus includes a semiconductor wafer with a plurality of probe pads each formed centered in scribe streets and intersected by saw kerf lanes. Each probe pad includes a plurality of lower level conductor layers arranged in lower level conductor frames, a plurality of lower level vias extending vertically through lower level insulator layers and electrically coupling the lower level conductor frames; a plurality of upper level conductor layers, each forming two portions on two outer edges of the probe pad, the two portions aligned with, spaced from, and on opposite sides of the saw kerf lane, the coverage of the upper level conductor layers being less than about twenty percent; and a plurality of upper level vias extending vertically through upper level insulator layers and coupling the upper level conductor layers electrically to one another and to the lower level conductor layers. Methods are disclosed.Type: ApplicationFiled: September 3, 2020Publication date: July 15, 2021Inventors: Ricky Alan Jackson, Erika Lynn Mazotti, Sudtida Lavangkul
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Patent number: 11004929Abstract: Various examples provide an electronic device that includes first and second resistor segments. Each of the resistor segments has a respective doped resistive region formed in a semiconductor substrate. The resistor segments are connected between first and second terminals. The first resistor segment is configured to conduct a current in a first direction, and the second resistor segment is configured to conduct the current in a second different direction. The directions may be orthogonal crystallographic directions of the semiconductor substrate.Type: GrantFiled: October 9, 2019Date of Patent: May 11, 2021Assignee: TEXAS INSTRUMENTS INCORPORATEDInventors: Dok Won Lee, Erika Lynn Mazotti, Mark Robert Visokay, William David French, Ricky Alan Jackson, Wai Lee
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Patent number: 10770406Abstract: An example apparatus includes a semiconductor wafer with a plurality of probe pads each formed centered in scribe streets and intersected by saw kerf lanes. Each probe pad includes a plurality of lower level conductor layers arranged in lower level conductor frames, a plurality of lower level vias extending vertically through lower level insulator layers and electrically coupling the lower level conductor frames; a plurality of upper level conductor layers, each forming two portions on two outer edges of the probe pad, the two portions aligned with, spaced from, and on opposite sides of the saw kerf lane, the coverage of the upper level conductor layers being less than about twenty percent; and a plurality of upper level vias extending vertically through upper level insulator layers and coupling the upper level conductor layers electrically to one another and to the lower level conductor layers. Methods are disclosed.Type: GrantFiled: November 21, 2017Date of Patent: September 8, 2020Assignee: TEXAS INSTRUMENTS INCORPORATEDInventors: Ricky Alan Jackson, Erika Lynn Mazotti, Sudtida Lavangkul
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Patent number: 10705159Abstract: An integrated fluxgate device has a magnetic core disposed over a semiconductor substrate. A first winding is disposed in a first metallization level above and a second metallization level below the magnetic core, and is configured to generate a first magnetic field in the magnetic core. A second winding is disposed in the first and second metallization levels and is configured to generate a second magnetic field in the magnetic core. A third winding is disposed in the first and second metallization levels and is configured to sense a magnetic field in the magnetic core that is the net of the first and second magnetic fields.Type: GrantFiled: July 3, 2019Date of Patent: July 7, 2020Assignee: TEXAS INSTRUMENTS INCORPORATEDInventors: Erika Lynn Mazotti, Dok Won Lee, William David French, Byron J R Shulver, Thomas Dyer Bonifield, Ricky Alan Jackson, Neil Gibson
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Publication number: 20200118720Abstract: Various examples provide an electronic device that includes first and second rectangular resistor segments, each resistor segment having a doped resistive region formed in a semiconductor substrate. The first resistor segment has a first trim end and a first bridge end, and the second resistor segment has a second bridge end. The first bridge end is adjacent the second bridge end. A conductive interconnect line connects to the first bridge end and to the second bridge end. At least one connection terminal to the first resistor segment is located at the first trim end.Type: ApplicationFiled: October 9, 2019Publication date: April 16, 2020Inventors: William David French, Erika Lynn Mazotti, Dok Won Lee, Keith Ryan Green
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Publication number: 20200119132Abstract: Various examples provide an electronic device that includes first and second resistor segments. Each of the resistor segments has a respective doped resistive region formed in a semiconductor substrate. The resistor segments are connected between first and second terminals. The first resistor segment is configured to conduct a current in a first direction, and the second resistor segment is configured to conduct the current in a second different direction. The directions may be orthogonal crystallographic directions of the semiconductor substrate.Type: ApplicationFiled: October 9, 2019Publication date: April 16, 2020Inventors: Dok Won Lee, Erika Lynn Mazotti, Mark Robert Visokay, William David French, Ricky Alan Jackson, Wai Lee
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Publication number: 20200075573Abstract: An electronic device, e.g. a trimmable resistor, includes a plurality of fused resistors, each fused resistor including one or more doped resistive regions formed in a semiconductor substrate. The doped resistive regions may be thermistors. Each fused resistor further includes a corresponding one of a plurality of fusible links. A first terminal of each of the fused resistors is connected to a first terminal of the corresponding fusible link. First and second interconnection buses are located over the substrate, with the first interconnection bus connecting to a second terminal of each of the fused resistors, and the second interconnection bus connecting to a second terminal of each of the fusible links. The plurality of fused resistors have resistance values that form an exponential progression.Type: ApplicationFiled: August 22, 2019Publication date: March 5, 2020Inventors: Steve Edward Harrell, Keith Eric Sanborn, Wai Lee, Erika Lynn Mazotti
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Publication number: 20190324097Abstract: An integrated fluxgate device has a magnetic core disposed over a semiconductor substrate. A first winding is disposed in a first metallization level above and a second metallization level below the magnetic core, and is configured to generate a first magnetic field in the magnetic core. A second winding is disposed in the first and second metallization levels and is configured to generate a second magnetic field in the magnetic core. A third winding is disposed in the first and second metallization levels and is configured to sense a magnetic field in the magnetic core that is the net of the first and second magnetic fields.Type: ApplicationFiled: July 3, 2019Publication date: October 24, 2019Inventors: Erika Lynn Mazotti, Dok Won Lee, William David French, Byron J.R. Shulver, Thomas Dyer Bonifield, Ricky Alan Jackson, Neil Gibson
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Patent number: 10365123Abstract: Some embodiments are directed to an anisotropic magneto-resistive (AMR) angle sensor. The sensor comprises a first Wheatstone bridge comprising a first serpentine resistor, a second serpentine resistor, a third serpentine resistor, and a fourth serpentine resistor. The sensor also comprises a second Wheatstone bridge comprising a fifth serpentine resistor, a sixth serpentine resistor, a seventh serpentine resistor, and an eighth serpentine resistor. The serpentine resistors comprise anisotropic magneto-resistive material that changes resistance in response to a change in an applied magnetic field. The sensor also includes a surrounding of anisotropic magneto-resistive material disposed in substantially a same plane as the serpentine resistors, enclosing the serpentine resistors, and electrically isolated from the serpentine resistors. The first Wheatstone bridge, the second Wheatstone bridge, and the surrounding of anisotropic magneto-resistive material are part of a sensor die.Type: GrantFiled: July 21, 2017Date of Patent: July 30, 2019Assignee: TEXAS INSTRUMENTS INCORPORATEDInventors: Dok Won Lee, Erika Lynn Mazotti, William David French
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Patent number: 10345397Abstract: An integrated fluxgate device has a magnetic core on a control circuit. The magnetic core has a volume and internal structure sufficient to have low magnetic noise and low non-linearity. A stress control structure is disposed proximate to the magnetic core. An excitation winding, a sense winding and a compensation winding are disposed around the magnetic core. An excitation circuit disposed in the control circuit is coupled to the excitation winding, configured to provide current at high frequency to the excitation winding sufficient to generate a saturating magnetic field in the magnetic core during each cycle at the high frequency. An isolation structure is disposed between the magnetic core and the windings, sufficient to enable operation of the excitation winding and the sense winding at the high frequency at low power.Type: GrantFiled: May 31, 2016Date of Patent: July 9, 2019Assignee: TEXAS INSTRUMENTS INCORPORATEDInventors: Erika Lynn Mazotti, Dok Won Lee, William David French, Byron J R Shulver, Thomas Dyer Bonifield, Ricky Alan Jackson, Neil Gibson
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Publication number: 20190025086Abstract: Some embodiments are directed to an anisotropic magneto-resistive (AMR) angle sensor. The sensor comprises a first Wheatstone bridge comprising a first serpentine resistor, a second serpentine resistor, a third serpentine resistor, and a fourth serpentine resistor. The sensor also comprises a second Wheatstone bridge comprising a fifth serpentine resistor, a sixth serpentine resistor, a seventh serpentine resistor, and an eighth serpentine resistor. The serpentine resistors comprise anisotropic magneto-resistive material that changes resistance in response to a change in an applied magnetic field. The sensor also includes a surrounding of anisotropic magneto-resistive material disposed in substantially a same plane as the serpentine resistors, enclosing the serpentine resistors, and electrically isolated from the serpentine resistors. The first Wheatstone bridge, the second Wheatstone bridge, and the surrounding of anisotropic magneto-resistive material are part of a sensor die.Type: ApplicationFiled: July 21, 2017Publication date: January 24, 2019Inventors: Dok Won LEE, Erika Lynn MAZOTTI, William David FRENCH
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Patent number: 10157861Abstract: Disclosed embodiments include an integrated circuit having a semiconductor substrate with insulator layers and conductor layers overlying the semiconductor substrate. A scribe region overlying the semiconductor substrate and a periphery of the integrated circuit includes a crack arrest structure and a scribe seal. The crack arrest structure provides first vertical conductor structure that surrounds the periphery of the integrated circuit. The scribe seal is spaced from and surrounded by the crack arrest structure and provides a second vertical conductor structure. The scribe seal includes first and second vias spaced from each other and connected to one of the conductor layers. The first via is a trench via and the second via is a stitch via, with the second via being located closer to the crack arrest structure than the first via.Type: GrantFiled: July 24, 2017Date of Patent: December 18, 2018Assignee: TEXAS INSTRUMENTS INCORPORATEDInventors: Ricky Alan Jackson, Sudtida Lavangkul, Erika Lynn Mazotti
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Patent number: 10147537Abstract: An integrated fluxgate device, which includes a magnetic core, an excitation coil, and a sense coil. The magnetic core has a longitudinal edge and a terminal edge. The excitation coil coils around the longitudinal edge of the magnetic core, and the excitation coil has a first number of excitation coil members within a proximity of the terminal edge. The sense coil coils around the longitudinal edge of the magnetic core, and the sense coil has a second number of sense coil members within the proximity of the terminal edge. For reducing fluxgate noise, the second number of sense coil members may be less than the first number of excitation coil members within the proximity of the terminal edge.Type: GrantFiled: December 6, 2017Date of Patent: December 4, 2018Assignee: TEXAS INSTRUMENTS INCORPORATEDInventors: Dok Won Lee, Sudtida Lavangkul, Erika Lynn Mazotti, William David French
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Publication number: 20180096784Abstract: An integrated fluxgate device, which includes a magnetic core, an excitation coil, and a sense coil. The magnetic core has a longitudinal edge and a terminal edge. The excitation coil coils around the longitudinal edge of the magnetic core, and the excitation coil has a first number of excitation coil members within a proximity of the terminal edge. The sense coil coils around the longitudinal edge of the magnetic core, and the sense coil has a second number of sense coil members within the proximity of the terminal edge. For reducing fluxgate noise, the second number of sense coil members may be less than the first number of excitation coil members within the proximity of the terminal edge.Type: ApplicationFiled: December 6, 2017Publication date: April 5, 2018Inventors: Dok Won Lee, Sudtida Lavangkul, Erika Lynn Mazotti, William David French