Patents by Inventor Erin Jones

Erin Jones has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20240131144
    Abstract: The present invention relates to formulations of dengue virus vaccine comprising at least one live, attenuated dengue virus or live, attenuated chimeric flavivirus, a buffer, a sugar, a cellulose derivative, a glycol or sugar alcohol, optionally an alkali or alkaline salt and an amino acid; and formulations of dengue virus vaccine comprising at least one live, attenuated dengue virus or live, attenuated chimeric flavivirus, a buffer, a sugar of at least 150 mg/ml, a carrier, and optionally an alkali or alkaline salt and an amino acid.
    Type: Application
    Filed: December 6, 2023
    Publication date: April 25, 2024
    Applicant: Merck Sharp & Dohme LLC
    Inventors: Michael S. Ryan, Sherrie-Ann P. Martin, Morrisa Jones, Justin Stanbro, Akhilesh Bhambhani, Jeffrey Thomas Blue, Heidi Joanne Pixley, Erin J. Green-Trexler, Lynne Ann Isopi
  • Publication number: 20170119851
    Abstract: The invention relates to the stimulation of appetite and treatment of such appetite-suppressed conditions as cachexia, and in particular to an intranasal route of administration for appetite-stimulating agents such as peptide compounds and fragments related to or comprising the Agouti-Related Peptide (AgRP).
    Type: Application
    Filed: May 19, 2015
    Publication date: May 4, 2017
    Applicant: NOVARTIS AG
    Inventors: Juli Erin JONES DAVENPORT, John Richard Neville HADCOCK
  • Publication number: 20070166214
    Abstract: A process for the recovery of nickel and/or cobalt from an impure nickel, cobalt or mixed nickel/cobalt material including the steps of: a) providing a nickel, cobalt or mixed nickel/cobalt material; and b) contacting the nickel, cobalt or mixed nickel/cobalt material with a feed ammoniacal ammonium carbonate solution and a reductant in a leach step.
    Type: Application
    Filed: April 8, 2004
    Publication date: July 19, 2007
    Inventors: Peter Anderson, Mark Fisher, John Fittock, Victoria Hultgren, Erin Jones, Robert Messenger, Adam Moroney
  • Publication number: 20070138556
    Abstract: A double-gate transistor has front (upper) and back gates aligned laterally by a process of forming symmetric sidewalls in proximity to the front gate and then oxidizing the back gate electrode at a temperature of at least 1000 degrees for a time sufficient to relieve stress in the structure, the oxide penetrating from the side of the transistor body to thicken the back gate oxide on the outer edges, leaving an effective thickness of gate oxide at the center, aligned with the front gate electrode. Optionally, an angled implant from the sides of an oxide enhancing species encourages relatively thicker oxide in the outer implanted areas and an oxide-retarding implant across the transistor body retards oxidation in the vertical direction, thereby permitting increase of the lateral extent of the oxidation.
    Type: Application
    Filed: February 16, 2007
    Publication date: June 21, 2007
    Applicant: INTERNATIONAL BUSINESS MACHINES CORPORATION
    Inventors: Omer Dokumaci, Bruce Doris, Kathryn Guarini, Suryanarayan Hegde, Meikei Ieong, Erin Jones
  • Publication number: 20070026617
    Abstract: A double gated silicon-on-insulator (SOI) MOSFET is fabricated by forming epitaxially grown channels, followed by a damascene gate. The double gated MOSFET features narrow channels, which increases current drive per layout width and provides low out conductance.
    Type: Application
    Filed: July 31, 2006
    Publication date: February 1, 2007
    Inventors: James Adkisson, Paul Agnello, Arne Ballantine, Rama Divakaruni, Erin Jones, Edward Nowak, Jed Rankin
  • Publication number: 20070010076
    Abstract: A structure and method of fabrication for MOSFET devices with a polycrystalline SiGe junction is disclosed. Ge is selectively grown on Si while Si is selectively grown on Ge. Alternating depositions of Ge and Si layers yield the SiGe junction. The deposited layers are doped, and subsequently the dopants outdiffused into the device body. A thin porous oxide layer between the polycrystalline Ge and Si layers enhances the isotropy of the SiGe junctions.
    Type: Application
    Filed: September 18, 2006
    Publication date: January 11, 2007
    Applicant: International Business Machines Corporation
    Inventors: Kevin Chan, Rober Miller, Erin Jones, Atul Ajmera
  • Publication number: 20060194414
    Abstract: Described is a wet chemical surface treatment involving NH4OH that enables extremely strong direct bonding of two wafer such as semiconductors (e.g., Si) to insulators (e.g., SiO2) at low temperatures (less than or equal to 400° C.). Surface energies as high as ˜4835±675 mJ/m2 of the bonded interface have been achieved using some of these surface treatments. This value is comparable to the values reported for significantly higher processing temperatures (less than 1000° C.). Void free bonding interfaces with excellent yield and surface energies of ˜2500 mJ/m2 have also be achieved herein.
    Type: Application
    Filed: April 26, 2006
    Publication date: August 31, 2006
    Applicant: International Business Machines Corporation
    Inventors: Kevin Chan, Kathryn Guarini, Erin Jones, Antonio Saavedra, Leathen Shi, Dinkar Singh
  • Publication number: 20050260832
    Abstract: A structure and method of fabrication for MOSFET devices with a polycrystalline SiGe junction is disclosed. Ge is selectively grown on Si while Si is selectively grown on Ge. Alternating depositions of Ge and Si layers yield the SiGe junction. The deposited layers are doped, and subsequently the dopants outdiffused into the device body. A thin porous oxide layer between the polycrystalline Ge and Si layers enhances the isotropy of the SiGe junctions.
    Type: Application
    Filed: May 21, 2004
    Publication date: November 24, 2005
    Inventors: Kevin Chan, Rober Miller, Erin Jones, Atul Ajmera
  • Publication number: 20050059252
    Abstract: A double-gate transistor has front (upper) and back gates aligned laterally by a process of forming symmetric sidewalls in proximity to the front gate and then oxidizing the back gate electrode at a temperature of at least 1000 degrees for a time sufficient to relieve stress in the structure, the oxide penetrating from the side of the transistor body to thicken the back gate oxide on the outer edges, leaving an effective thickness of gate oxide at the center, aligned with the front gate electrode. Optionally, an angled implant from the sides of an oxide enhancing species encourages relatively thicker oxide in the outer implanted areas and an oxide-retarding implant across the transistor body retards oxidation in the vertical direction, thereby permitting increase of the lateral extent of the oxidation.
    Type: Application
    Filed: September 15, 2003
    Publication date: March 17, 2005
    Applicant: INTERNATIONAL BUSINESS MACHINES CORPORATION
    Inventors: Omer Dokumaci, Bruce Doris, Kathryn Guarini, Suryanarayan Hegde, MeiKei Ieong, Erin Jones
  • Publication number: 20050042841
    Abstract: A method of fabricating a SOI wafer having a gate-quality, thin buried oxide region is provided. The wafer is fabricating by forming a substantially uniform thermal oxide on a surface of a Si-containing layer of a SOI substrate which includes a buried oxide region positioned between the Si-containing layer and a Si-containing substrate layer. Next, a cleaning process is employed to form a hydrophilic surface on the thermal oxide. A carrier wafer having a hydrophilic surface is provided and positioned near the substrate such that the hydrophilic surfaces adjoin each other. Room temperature bonding is then employed to bond the carrier wafer to the substrate. An annealing step is performed and thereafter, the Si-containing substrate of the silicon-on-insulator substrate and the buried oxide region are selectively removed to expose the Si-containing layer.
    Type: Application
    Filed: October 4, 2004
    Publication date: February 24, 2005
    Applicant: INTERNATIONAL BUSINESS MACHINES CORPORATION
    Inventors: Diane Boyd, Hussein Hanafi, Erin Jones, Dominic Schepis, Leathen Shi
  • Publication number: 20050001216
    Abstract: A double gated silicon-on-insulator (SOI) MOSFET is fabricated by forming epitaxially grown channels, followed by a damascene gate. The double gated MOSFET features narrow channels, which increases current drive per layout width and provides low out conductance.
    Type: Application
    Filed: June 16, 2004
    Publication date: January 6, 2005
    Inventors: James Adkisson, Paul Agnello, Arne Ballantine, Rama Divakaruni, Erin Jones, Edward Nowak, Jed Rankin
  • Patent number: 5571860
    Abstract: An emulsion adhesion composition comprising a polyvinyl alcohol stabilized polymer emulsion; the polymer comprising 40 to 94.5% by weight of a vinyl ester of an C.sub.1 -C.sub.13 alkanoic acid, 5 to 40% by weight ethylene and 0.5 to 10% by weight N-vinyl formamide or N-vinyl pyrrolidone, the adhesive being characterized by superior adhesion and heat resistance.
    Type: Grant
    Filed: June 2, 1995
    Date of Patent: November 5, 1996
    Assignee: National Starch and Chemical Investment Holding Corporation
    Inventors: Pravin K. Kukkala, Malcolm F. Hallam, M. Erin Jones, Richard K. Vetterl
  • Patent number: 5442001
    Abstract: The use of C.sub.1 -C.sub.5 alkyl butyrates, d-limonene, ethylene glycol monobutyl ether and C.sub.5 -C.sub.20 petroleum distillates and normal paraffins in place of methyl chloroform (1,1,1-trichloroethane) in conventional waterborne packaging and converting adhesives provides comparable or better adhesive products with reduced environmental and health related problems.
    Type: Grant
    Filed: September 7, 1994
    Date of Patent: August 15, 1995
    Assignee: National Starch and Chemical Investment Holding Corporation
    Inventors: M. Erin Jones, Paul P. Puletti