Patents by Inventor Erkan Acar
Erkan Acar has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
-
Patent number: 11656247Abstract: A coaxial wire interconnect architecture and associated methods are described. In one example, the coaxial wire interconnect architecture is used in a test socket interconnect array. Flexible bends are formed in one or more of the coaxial wire interconnects to provide compliant connections to an electronic device during testing.Type: GrantFiled: March 31, 2017Date of Patent: May 23, 2023Assignee: Intel CorporationInventors: Ronald Michael Kirby, Erkan Acar, Joe Walczyk, Youngseok Oh, Justin M Huttula, Mohanraj Prabhugoud
-
Publication number: 20220373592Abstract: An apparatus is provided that is implemented to enable multiple tests of different types, such as a direct current (DC) test and/or a radio frequency (RF) test of a semiconductor device. The apparatus includes a microelectromechanical systems (MEMS) switch block coupled between the semiconductor device and automatic testing equipment (ATE). The apparatus is configured to enable/disable a DC path or an RF path to switch between a DC test and an RF test without reconfiguring the connections between the semiconductor device and the ATE. The DC path is used to perform a DC contact test for one or more pins of the semiconductor device. The RF path is used to perform an RF test for the semiconductor device.Type: ApplicationFiled: May 17, 2022Publication date: November 24, 2022Applicant: Analog Devices International Unlimited CompanyInventors: Padraig Fitzgerald, Erkan Acar, Patrick M. McGuinness, Randy Oltman, Naveen Dhull, Derek W. Nolan, Eric James Carty
-
Publication number: 20200141979Abstract: A coaxial wire interconnect architecture and associated methods are described. In one example, the coaxial wire interconnect architecture is used in a test socket interconnect array. Flexible bends are formed in one or more of the coaxial wire interconnects to provide compliant connections to an electronic device during testing.Type: ApplicationFiled: March 31, 2017Publication date: May 7, 2020Inventors: Ronald Michael Kirby, Erkan Acar, Joe Walczyk, Youngseok Oh, Justin M Huttula, Mohanraj Prabhugoud
-
Patent number: 10644458Abstract: A shielded interconnect array and associated methods are described. Examples of the shielded interconnect array include socket connections that include conductive members with flexible bends. In examples shown, corresponding grounded conductive members with flexible bends are located adjacent to other conductive members with flexible bends to provide shielding.Type: GrantFiled: March 31, 2017Date of Patent: May 5, 2020Assignee: Intel CorporationInventors: Youngseok Oh, Justin M Huttula, Mohanraj Prabhugoud, Ronald Kirby, Joe Walczyk, Erkan Acar
-
Patent number: 10469181Abstract: A test apparatus and method of testing a DUT are described. The apparatus includes a receiver and transmitter path each having a pair of switches that switch between a bypass position and a direct position. The bypass position is used for low frequency signals communicated through the apparatus. The direct position allows higher frequency signals to be double converted by upconversion to an IF signal and bandpass filtered before being downconverted to a predetermined frequency. Both variable and fixed LO signals are used to convert the double converted signals so that the same IF may be used independent of the higher frequency signal received or transmitted. Bandpass filtering is applied before and after amplification of the IF signal. Lowpass filtering before and after the double conversion use LPFs of different cutoff frequencies.Type: GrantFiled: May 31, 2018Date of Patent: November 5, 2019Assignee: Intel CorporationInventors: Jin Pan, Erkan Acar, Stephen S. Sturges
-
Publication number: 20190293707Abstract: In one embodiment, a device to test one or more electronic components comprises a first card comprising a first test device communicatively coupled to at least a first connector assembly positioned on the first card and a second card comprising a second test device communicatively coupled to at least a second connector assembly positioned on the second card. The at least a first connector assembly is directly communicatively coupled to the at least a second connector assembly to provide a direct communication interface between the first test device and the second test device that is not routed via a backplane. Other embodiments may be described.Type: ApplicationFiled: November 28, 2017Publication date: September 26, 2019Applicant: Intel CorporationInventors: Erkan ACAR, Abram M. DETOFSKY, Jin PAN
-
Publication number: 20180351662Abstract: A test apparatus and method of testing a DUT are described. The apparatus includes a receiver and transmitter path each having a pair of switches that switch between a bypass position and a direct position. The bypass position is used for low frequency signals communicated through the apparatus. The direct position allows higher frequency signals to be double converted by upconversion to an IF signal and bandpass filtered before being downconverted to a predetermined frequency. Both variable and fixed LO signals are used to convert the double converted signals so that the same IF may be used independent of the higher frequency signal received or transmitted. Bandpass filtering is applied before and after amplification of the IF signal. Lowpass filtering before and after the double conversion use LPFs of different cutoff frequencies.Type: ApplicationFiled: May 31, 2018Publication date: December 6, 2018Inventors: Jin Pan, Erkan Acar, Stephen S. Sturges
-
Patent number: 10101367Abstract: A microelectronic test device comprising an organic substrate, a probe holder, and an interposer disposed between the organic substrate and the probe holder, wherein the interposer has a coefficient of thermal expansion that is less than a coefficient of thermal expansion of the organic substrate. The interposer may effectively decouple the organic substrate from probes in the probe holder, which may substantially reduce or eliminate probe misalignment due to the coefficient of thermal expansion mismatch between the organic substrate and other components of the microelectronic test device and to provide require stiffness to the organic substrate.Type: GrantFiled: April 10, 2015Date of Patent: October 16, 2018Assignee: Intel CorporationInventors: Jin Pan, Jin Yang, Erkan Acar
-
Patent number: 10101381Abstract: A test system includes a test printed circuit board (PCB), a flip chip package mounted on the PCB, one or more test probes coupled to the flip chip package and a first integrated circuit (IC) coupled to the test probes to enable testing of the first IC using electrical circuitry of the flip chip package.Type: GrantFiled: August 31, 2012Date of Patent: October 16, 2018Assignee: Intel CorporationInventors: Erkan Acar, Pooya Tadayon, Armen Y. Balian, Ethan Caughey
-
Publication number: 20180287305Abstract: A shielded interconnect array and associated methods are described. Examples of the shielded interconnect array include socket connections that include conductive members with flexible bends. In examples shown, corresponding grounded conductive members with flexible bends are located adjacent to other conductive members with flexible bends to provide shielding.Type: ApplicationFiled: March 31, 2017Publication date: October 4, 2018Inventors: Youngseok Oh, Justin M. Huttula, Mohanraj Probhugoud, Ronald Kirby, Joe Walczyk, Erkan Acar
-
Publication number: 20180188288Abstract: In one embodiment, a device to test one or more electronic components comprises a first card comprising a first test device communicatively coupled to at least a first connector assembly positioned on the first card and a second card comprising a second test device communicatively coupled to at least a second connector assembly positioned on the second card. The at least a first connector assembly is directly communicatively coupled to the at least a second connector assembly to provide a direct communication interface between the first test device and the second test device that is not routed via a backplane. Other embodiments may be described.Type: ApplicationFiled: December 29, 2016Publication date: July 5, 2018Applicant: Intel CorporationInventors: Erkan Acar, Abram M. Detofsky, Jin Pan
-
Patent number: 9581639Abstract: Electronic device assemblies and methods including an organic substrate based space transformer are described. One assembly includes a space transformer comprising an organic substrate. The assembly also includes a carrier on which the space transformer is positioned, and a clamp positioned to couple the space transformer to the carrier. The assembly also includes a probe array positioned on the space transformer, wherein the space transformer is positioned between the probe array and the carrier. The assembly also includes a printed circuit board, wherein the carrier is positioned between the printed circuit board and the space transformer. The assembly also includes electrical connections to electrically couple the space transformer to the printed circuit board. Other embodiments are described and claimed.Type: GrantFiled: December 28, 2013Date of Patent: February 28, 2017Assignee: INTEL CORPORATIONInventors: Jin Yang, Erkan Acar, Todd P. Albertson, Joe F. Walczyk
-
Publication number: 20160299174Abstract: A microelectronic test device comprising an organic substrate, a probe holder, and an interposer disposed between the organic substrate and the probe holder, wherein the interposer has a coefficient of thermal expansion that is less than a coefficient of thermal expansion of the organic substrate. The interposer may effectively decouple the organic substrate from probes in the probe holder, which may substantially reduce or eliminate probe misalignment due to the coefficient of thermal expansion mismatch between the organic substrate and other components of the microelectronic test device and to provide require stiffness to the organic substrate.Type: ApplicationFiled: April 10, 2015Publication date: October 13, 2016Inventors: Jin Pan, Jin Yang, Erkan Acar
-
Publication number: 20150185252Abstract: Electronic device assemblies and methods including an organic substrate based space transformer are described. One assembly includes a space transformer comprising an organic substrate. The assembly also includes a carrier on which the space transformer is positioned, and a clamp positioned to couple the space transformer to the carrier. The assembly also includes a probe array positioned on the space transformer, wherein the space transformer is positioned between the probe array and the carrier. The assembly also includes a printed circuit board, wherein the carrier is positioned between the printed circuit board and the space transformer. The assembly also includes electrical connections to electrically couple the space transformer to the printed circuit board. Other embodiments are described and claimed.Type: ApplicationFiled: December 28, 2013Publication date: July 2, 2015Inventors: Jin YANG, Erkan ACAR, Todd P. ALBERTSON, Joe F. WALCZYK
-
Publication number: 20140062522Abstract: A test system includes a test printed circuit board (PCB), a flip chip package mounted on the PCB, one or more test probes coupled to the flip chip package and a first integrated circuit (IC) coupled to the test probes to enable testing of the first IC using electrical circuitry of the flip chip package.Type: ApplicationFiled: August 31, 2012Publication date: March 6, 2014Inventors: Erkan Acar, Pooya Tadayon, Armen Y. Balian, Ethan Caughey