Patents by Inventor Ernest Armand Bron

Ernest Armand Bron has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 6937487
    Abstract: A power management system includes a voltage booster in combination with a voltage regulator to provide a regulated output voltage. The voltage provided to the voltage regulator is used to selectively enable/disable the doubling functionality of the voltage booster to increase power conversion efficiency.
    Type: Grant
    Filed: April 29, 2003
    Date of Patent: August 30, 2005
    Assignee: National Semiconductor Corporation
    Inventor: Ernest Armand Bron
  • Patent number: 6806693
    Abstract: An oscillator circuit is coupled to an enable pin of an Voltage regulator so that total power consumption is minimized in the application. A filter capacitor is coupled to the Voltage regulator such that current is supplied to the load (the application) while the Voltage regulator is disabled. The frequency of the oscillator circuit is low such that power consumption by the oscillator is minimal. The duty cycle (DC) of the oscillator circuit is selected so that the output voltage across the load does not drop below minimum voltage requirements in the application. The total current (I) that is consumed by the system corresponds to: I=DC*Idq+(1−DC)*Iq+Iosc+Iapp, where Iq corresponds to the shutdown current of the LDO, Idq is the ground current of the LDO, Iosc is the oscillator operating current, and Iapp is the average current consumed by the application.
    Type: Grant
    Filed: April 14, 2003
    Date of Patent: October 19, 2004
    Assignee: National Semiconductor Corporation
    Inventor: Ernest Armand Bron
  • Patent number: 6163874
    Abstract: An apparatus and method for generating a sequence of random, repeatable events for testing a cloned device against the device from which it is derived. The invention includes elements used to double the speed at which the event generator produces the events. This allows the event generator to be used in the testing of devices, such as CPUs, which operate at relatively high clock rates.
    Type: Grant
    Filed: September 23, 1997
    Date of Patent: December 19, 2000
    Assignee: National Semiconductor Corporation
    Inventor: Ernest Armand Bron