Abstract: A system for interconnecting at least two die each die having a plurality of conducting layers and dielectric layers disposed upon a substrate which may include active and passive elements. In one embodiment there is at least one interconnect coupling at least one conducting layer on a side of one die to at least one conducting layer on a side of the other die. Another interconnect embodiment is a slug having conducting and dielectric layers disposed between two or more die to interconnect between the die. Other interconnect techniques include direct coupling such as rod, ball, dual balls, bar, cylinder, bump, slug, and carbon nanotube, as well as indirect coupling such as inductive coupling, capacitive coupling, and wireless communications. The die may have features to facilitate placement of the interconnects such as dogleg cuts, grooves, notches, enlarged contact pads, tapered side edges and stepped vias.

Abstract: A system for interconnecting at least two die each die having a plurality of conducting layers and dielectric layers disposed upon a substrate which may include active and passive elements. In one embodiment there is at least one interconnect coupling at least one conducting layer on a side of one die to at least one conducting layer on a side of the other die. Another interconnect embodiment is a slug having conducting and dielectric layers disposed between two or more die to interconnect between the die. Other interconnect techniques include direct coupling such as rod, ball, dual balls, bar, cylinder, bump, slug, and carbon nanotube, as well as indirect coupling such as inductive coupling, capacitive coupling, and wireless communications. The die may have features to facilitate placement of the interconnects such as dogleg cuts, grooves, notches, enlarged contact pads, tapered side edges and stepped vias.

Abstract: A D-type flip-flop (10) receives the D input on an input line (14) of a transfer gate (12) that also receives the flip-flop clock signal. A state gate (20) forwards the transmission-gate output when the signals on two of its input lines (22) and (24) remain true. To reset the flip-flop asynchronously, a false signal is imposed on one of the input lines (22) of the state gate (20). By coordination of a second clock signal, which is applied to a second transmission gate (34), with the reset signal, the reset condition is held until the next clock pulse on the first transmission gate (12). The flip-flop ordinarily operates as a dynamic circuit, but, in order to maintain the reset condition in circumstances in which the reset state is to be maintained for an extended period of time, a latch gate (26) is enabled by a true signal on one of its input lines (32) to feed the reset output of the state gate 20 to one of its input terminals (24 ) so as to latch the flip-flop in the reset state.

Abstract: A method of adapting a miniature standard coaxial connector to enable the coupling of a fiber optic cable to an active device is disclosed in which the female portion of the connector is partially disassembled by removing its central contact and modified by drilling out or otherwise enlarging the passage which is left after the removal of the contact. The active device is mounted through a hole drilled in a printed circuit board, and electrically coupled to the top layer thereof. This unit is then affixed to the end of the female connector carrying the enlarged passage, such that the metalized layer on the printed circuit board makes electrical contact with the metal casing of the female portion of the connector, and such that the face of the active element is exposed through the enlarged passage.

Abstract: Apparatus is disclosed which generates simulated radar target signal returns that are input to radar equipment to test the equipment and to train radar operators. A small number of individual simulated radar target signal scenarios are provided which are easily selectively combined to provide a large plurality of training scenarios on a radar display. The equipment provides such features as multiple aircraft display, terrain masking, variable target size, range gate splitting, identification friend or foe, and ambiguity checking. The radar signal generator apparatus utilizes a stored binary data word representing each simulated radar target trace and each data word contains bit fields for each of the above target features as well as the simulated target position on the radar display indicator. A single counter driven by the radar system clock is used to generate binary numbers that are compared to the target position information of each stored target data word.