Patents by Inventor Ernest Henry Wittenbreder, Jr.

Ernest Henry Wittenbreder, Jr. has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 11626795
    Abstract: The subject invention reveals new methods and structures for achieving single stage power conversion with both regulated input current and regulated output voltage processing a minimum of load power and thereby achieving higher efficiency than other singles stage power converters with both regulated input current and regulated output voltage and two stage power factor corrected power converters. The subject invention reveals power factor corrected converters that improve the efficiency of the single stage power factor corrected converters on which they are based by adding an auxiliary converter that processes a small fraction of the total load power.
    Type: Grant
    Filed: January 30, 2021
    Date of Patent: April 11, 2023
    Inventor: Ernest Henry Wittenbreder, Jr.
  • Patent number: 11515789
    Abstract: Circuit structures and methods are described for achieving zero voltage switching in flying capacitor converters for both isolated and non-isolated applications. A first method is described in which zero voltage switching is achieved by operating the circuit with a variable frequency so that each switch in its on state remains on until the magnetizing current in a main inductor is reversed to a current magnitude sufficient to drive a zero voltage switching transition for a main switch. A second method is implemented with a main coupled inductor wherein a winding current is reversed and energy in a leakage inductance drives a zero voltage switching transition for a main switch. A third method is implemented with auxiliary inductors, auxiliary switches, and auxiliary capacitors which reverse the current in the auxiliary inductor which provides the necessary energy for driving a zero voltage switching transition for a main switch.
    Type: Grant
    Filed: January 30, 2021
    Date of Patent: November 29, 2022
    Inventor: Ernest Henry Wittenbreder, Jr.
  • Publication number: 20220345032
    Abstract: The subject invention reveals new methods and structures for achieving single stage power conversion with both regulated input current and regulated output voltage processing a minimum of load power and thereby achieving higher efficiency than other singles stage power converters with both regulated input current and regulated output voltage and two stage power factor corrected power converters. The subject invention reveals power factor corrected converters that improve the efficiency of the single stage power factor corrected converters on which they are based by adding an auxiliary converter that processes a small fraction of the total load power.
    Type: Application
    Filed: January 30, 2021
    Publication date: October 27, 2022
    Inventor: Ernest Henry Wittenbreder, JR.
  • Publication number: 20220247310
    Abstract: Circuit structures and methods are described for achieving zero voltage switching in flying capacitor converters for both isolated and non-isolated applications. A first method is described in which zero voltage switching is achieved by operating the circuit with a variable frequency so that each switch in its on state remains on until the magnetizing current in a main inductor is reversed to a current magnitude sufficient to drive a zero voltage switching transition for a main switch. A second method is implemented with a main coupled inductor wherein a winding current is reversed and energy in a leakage inductance drives a zero voltage switching transition for a main switch. A third method is implemented with auxiliary inductors, auxiliary switches, and auxiliary capacitors which reverse the current in the auxiliary inductor which provides the necessary energy for driving a zero voltage switching transition for a main switch.
    Type: Application
    Filed: January 30, 2021
    Publication date: August 4, 2022
    Inventor: Ernest Henry Wittenbreder, JR.
  • Patent number: 7956491
    Abstract: Methods, systems, and devices are described for integrating multiple transformers on a shared core, while avoiding interference between the transformers and other potentially undesirable effects of the integration. In one embodiment, multiple transformers are wound on a shared core. Each transformer is wound on the core, so that its primary and secondary windings are magnetically coupled to each other through the core without being coupled to the windings of other transformers sharing the core. The multiple integrated transformers may then be provided in a circuit arrangement by placing only a single core element in the arrangement.
    Type: Grant
    Filed: March 16, 2009
    Date of Patent: June 7, 2011
    Assignee: ASIC Advantage Inc.
    Inventors: Sam Seiichiro Ochi, Ernest Henry Wittenbreder, Jr.
  • Patent number: 7944188
    Abstract: A new bipolar output boost converter for ac input applications is revealed. The new boost converter is bridgeless, i.e., it does not require use of a line frequency diode rectifier which improves the efficiency of the converter significantly. The new bipolar boost converter does not include the common mode noise generating mechanisms of prior art ac input bridgeless boost rectifier circuits, thereby easing electromagnetic compatibility problems. Although the new converter requires two output filter capacitors, total capacitor stored energy is the same as other boost converters of the same power level so that capacitor volume and cost is not significantly adversely effected. Zero voltage switching cells which can be substituted for a switch to eliminate first order switching losses are also revealed. New three terminal bipolar input source switching networks having operating properties similar to conventional full bridge source switching networks are also revealed.
    Type: Grant
    Filed: November 8, 2008
    Date of Patent: May 17, 2011
    Inventor: Ernest Henry Wittenbreder, Jr.
  • Patent number: 7864549
    Abstract: The subject invention reveals a new coupled inductor boost converter which achieves zero voltage turn on switching for all four circuit switches. The coupled inductor of the circuit is fully clamped and thereby achieves excellent noise performance with neither snubbers nor clamps. The new coupled inductor boost converter is outstanding for isolated high voltage applications because the voltage stress of the secondary switches does not exceed the output voltage, it requires only one magnetic circuit element, and the average voltage stress of the secondary winding is equal to or less than half the output voltage.
    Type: Grant
    Filed: June 14, 2009
    Date of Patent: January 4, 2011
    Inventor: Ernest Henry Wittenbreder, Jr.
  • Patent number: 7714548
    Abstract: The subject invention reveals new adaptive gate drive timing circuits that are optimal for both sufficient energy and insufficient energy conditions for optimal turn on transition timing of a power mosfet in a zero voltage switching power supply. The circuit does not rely on a rectifier connected to the drain of the power mosfet to detect the zero voltage condition of the mosfet. The circuit relies on the detection of a discharge current in a capacitance connected to the drain of the power mosfet. Turn on of the mosfet is held off while discharge current exists and the gate of the mosfet is enabled at the instant that the discharge current drops to zero. In one embodiment of the invention discharge current of the intrinsic gate drain capacitance of the mosfet is relied upon as the source of timing information.
    Type: Grant
    Filed: November 8, 2007
    Date of Patent: May 11, 2010
    Inventor: Ernest Henry Wittenbreder, Jr.
  • Patent number: 7649754
    Abstract: The subject invention reveals a new three terminal canonical cell for non-isolated power conversion. The canonical cell achieves reduced semiconductor component stresses for applications with limited line voltage range for small step up and step down ratios or for large step up and step down ratios. Some of the canonical cells can be used to form buck, boost, and buck boost converters. The new canonical cell achieves zero voltage switching over a broad range of line and load voltages and is self limiting without the addition of additional components to sense and respond to over load current.
    Type: Grant
    Filed: October 1, 2007
    Date of Patent: January 19, 2010
    Inventor: Ernest Henry Wittenbreder, Jr.
  • Patent number: 7606051
    Abstract: The subject invention reveals improvement methods for circuits that use a coupled inductor wherein overshoot and ringing associated with leakage inductance of said coupled inductor is entirely eliminated by addition of non-dissipative active clamp networks that clamp each winding during each operating state of a power supply containing said coupled inductor. A further improvement applicable to zero voltage switching circuits that employ an inductor for driving a zero voltage turn on switching transition of a switch enables elimination of said inductor and preserves said zero voltage switching properties by adding leakage inductance to a coupled inductor without any adverse overshoot and ringing effects associated with said leakage inductance. The subject invention also reveals a coupled inductor with enhanced leakage inductance which can be used with said other improvements.
    Type: Grant
    Filed: November 2, 2006
    Date of Patent: October 20, 2009
    Inventor: Ernest Henry Wittenbreder, Jr.
  • Publication number: 20090230776
    Abstract: Methods, systems, and devices are described for integrating multiple transformers on a shared core, while avoiding interference between the transformers and other potentially undesirable effects of the integration. In one embodiment, multiple transformers are wound on a shared core. Each transformer is wound on the core, so that its primary and secondary windings are magnetically coupled to each other through the core without being coupled to the windings of other transformers sharing the core. The multiple integrated transformers may then be provided in a circuit arrangement by placing only a single core element in the arrangement.
    Type: Application
    Filed: March 16, 2009
    Publication date: September 17, 2009
    Applicant: ASIC Advantage Inc.
    Inventors: Sam Seiichiro Ochi, Ernest Henry Wittenbreder, JR.
  • Patent number: 7589571
    Abstract: An improved capacitor coupled floating gate drive circuit is revealed that provides an effective drive mechanism for a floating or high side switch without the use of level shifting circuits or magnetic coupling. The capacitor coupled floating gate drive circuit is an improvement over prior art capacitor coupled floating gate drive circuits in that the new circuit uses a positive current feedback mechanism to reject slowly changing voltage variations that cause unintentional switch state changes in prior art capacitor coupled floating gate drive circuits.
    Type: Grant
    Filed: June 22, 2008
    Date of Patent: September 15, 2009
    Inventor: Ernest Henry Wittenbreder, Jr.
  • Patent number: 7551459
    Abstract: The subject invention reveals a new coupled inductor boost converter which achieves zero voltage turn on switching for all four circuit switches. The coupled inductor of the circuit is fully clamped and thereby achieves excellent noise performance with neither snubbers nor clamps. The new coupled inductor boost converter is outstanding for isolated high voltage applications because the voltage stress of the secondary switches does not exceed the output voltage, it requires only one magnetic circuit element, and the average voltage stress of the secondary winding is equal to or less than half the output voltage.
    Type: Grant
    Filed: January 25, 2007
    Date of Patent: June 23, 2009
    Inventor: Ernest Henry Wittenbreder, Jr.
  • Patent number: 7480156
    Abstract: The subject invention reveals new three terminal tapped inductor canonical cells for non-isolated power conversion. The canonical cells achieve reduced semiconductor component stresses for applications with limited line voltage range for small step up and step down ratios or for large step up and step down ratios. Some of the canonical cells can be used to form buck, boost, and buck boost converters. Another of the canonical cells is a member of the SEPIC family which can both step up and step down or operate in all four quadrants. Related canonical cells which achieve zero voltage switching and improved electromagnetic compatibility are also revealed. A new more robust floating gate drive control circuit is revealed which operates without magnetic components, without optical coupling, and without high voltage semiconductors is revealed.
    Type: Grant
    Filed: January 5, 2007
    Date of Patent: January 20, 2009
    Inventor: Ernest Henry Wittenbreder, Jr.
  • Patent number: 7466168
    Abstract: A floating gate drive circuit is revealed that provides boot strap gate drive energy for floating switches with reference terminals that swing between two non-zero dc voltages.
    Type: Grant
    Filed: February 1, 2007
    Date of Patent: December 16, 2008
    Inventor: Ernest Henry Wittenbreder, Jr.
  • Patent number: 7439717
    Abstract: A synchronously switched buck post regulator is revealed for multi-output forward converters. The synchronously switched buck post regulator accomplishes precise independent load regulation for each output and reduced magnetics volume by using a coupled inductor with a common core for all outputs plus a second smaller inductor for each output except the highest voltage output.
    Type: Grant
    Filed: March 12, 2007
    Date of Patent: October 21, 2008
    Inventor: Ernest Henry Wittenbreder, Jr.
  • Patent number: 6856522
    Abstract: Synchronous rectifier gate drive mechanisms are revealed which are universally applicable to zero voltage switching power converters which rely on an auxiliary inductor to drive the critical turn on transition of the main switch of the power converter. One of the gate drive mechanisms revealed can also be used to improve the ZVS load range of the converter and to increase the power capability of the converter. Voltage limiting circuits that clamp the gate voltage of a synchronous rectifier during the turn off transition of the synchronous rectifier, preventing inadvertent turn on of the synchronous rectifier, are revealed.
    Type: Grant
    Filed: September 13, 2003
    Date of Patent: February 15, 2005
    Assignee: Technical Witts, Inc.
    Inventor: Ernest Henry Wittenbreder, Jr.
  • Patent number: 6411153
    Abstract: A universal zero voltage transition switching cell using a small choke, a pair of switches, and a capacitor is revealed. The application of the universal zero voltage transition switching cell to any of a wide variety of hard switching pulse width modulated power converter topologies yields identical power converters with zero voltage switching properties, without the requirement that the magnetizing current in the main power choke be reversed during each switching cycle. In the subject invention the energy required to drive the critical zero voltage switching transition is provided by the small choke that forms part of the universal zero voltage transition switching cell. The application of the universal zero voltage transition switching cell to buck, boost, buck boost, Cuk, Wittenbreder, flyback, forward, and SEPIC converters is shown.
    Type: Grant
    Filed: January 29, 2001
    Date of Patent: June 25, 2002
    Assignee: Technical Witts, Inc.
    Inventor: Ernest Henry Wittenbreder, Jr.
  • Patent number: 6101108
    Abstract: The power conversion system of this invention achieves precisely regulated input current and precisely regulated output voltage in a two step process whereby one power converter sub-system (141) provides input current regulation and a second power converter sub-system (158) provides output voltage regulation. The two converter sub-systems are arranged so that the second power converter sub-system (158) is powered by the first power converter sub-system (141) and the output of the second power converter sub-system (158) is placed in series with an output of the first power converter sub-system (141) to form the system output so that the load voltage is the sum of the two outputs placed in series. With this arrangement only a small fraction of the load power needs to be processed by the second power converter sub-system (158) which yields higher system efficiency and smaller system size, weight, and cost.
    Type: Grant
    Filed: August 13, 1999
    Date of Patent: August 8, 2000
    Assignee: Technical Witts, Inc.
    Inventor: Ernest Henry Wittenbreder, Jr.