Patents by Inventor Ernest J. Funk

Ernest J. Funk has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 4278348
    Abstract: A locking device for use in the chuck of an optical alignment and exposure apparatus is disclosed. The locking device comprises a plurality of flat, flexible blades fastened in pairs to a chuck plate in the chuck. Between each pair of blades there is a stationary element fastened to a base member in the chuck. Vacuum cups are fastened to the blades so that the blades are clamped tightly against the stationary element when the vacuum cups are evacuated.
    Type: Grant
    Filed: November 26, 1979
    Date of Patent: July 14, 1981
    Assignee: Quintel Corporation
    Inventors: Ernest J. Funk, Thomas Wing, Jack C. Lane, Edward S. Westbrook, IV
  • Patent number: 4253111
    Abstract: In the bonding apparatus disclosed herein, possible misalignment of a semiconductor chip at the work station is sensed by first optically scanning the workpiece using a video scanning head mounted on a common X-Y carriage with the bonding head. A zone signal is generated which defines, within the scanned area, a limited zone of consideration. The video signal is evaluated as a function of the zone signal to measure the extent of coincidence between the zone and a target area on the workpiece. The placement and dimensions of the zone are progressively adjusted responsive to the evaluation and in accordance with a search algorithm to locate at least two target areas on the workpiece and the bonding head is then traversed to adjusted target coordinates derived from the optically located target areas.
    Type: Grant
    Filed: September 25, 1978
    Date of Patent: February 24, 1981
    Assignee: GCA Corporation
    Inventors: Ernest J. Funk, Russell Union, Margaret M. Pratt
  • Patent number: 3947867
    Abstract: Semiconductor devices containing integrated circuits are attached directly to external package leads by pressing simultaneously a plurality of groups of leads against bonding pads on a plurality of face-up semiconductor dice and heating the composite structures. Solder bumps on the bonding pads contain hard pedestals which prevent the overlying leads from being pushed into the faces of the semiconductor devices while the solder on the solder bumps melts to form the bonds between the leads and the underlying semiconductor dice. The process for carrying out this operation lowers significantly the cost of each packaged semiconductor device and the resulting structure is more reliable than structures of the prior art.
    Type: Grant
    Filed: December 21, 1970
    Date of Patent: March 30, 1976
    Assignee: Signetics Corporation
    Inventors: Edward F. Duffek, Ernest J. Funk, Alfred S. Jankowski, Jack C. Lane, William L. Lehner, Floyd F. Oliver, Mark R. Schneider