Abstract: The deployable steps for a tailgate includes a mounting plate, a plurality of risers, a plurality of treads, and a plurality of hinges. The deployable steps for a tailgate may attach to a tailgate of a truck via the mounting plate. The plurality of risers and the plurality of treads may fold and unfold at the plurality of hinges. The plurality of risers and the plurality of treads may form steps when unfolded into a deployed position. When folded into a stowed position, the plurality of risers and the plurality of treads may be parallel to each other and may be parallel to the tailgate.

Abstract: A litter containment and disposal apparatus is provided, the apparatus comprising: an open top rectangular portion having a bottom with at least one cutout opening therein and at least three sides; a drawer in communication with a portion of the bottom, wherein the drawer is directly below and slightly larger than the at least one cutout opening; and a container comprising a support portion and a liquid impervious shell which may contain absorbent material attached to the support portion, wherein the support portion is smaller than the drawer and adapted to fit inside the drawer and liquid impervious shell containing absorbent material hangs from the support portion below the drawer.

Abstract: An apparatus for providing current to a device under test includes a first parametric measurement unit configured to provide current to the device, and a second parametric measurement unit configured to provide current to the device. The current from the second parametric measurement unit augments the current from the first parametric measurement unit at the device.

Abstract: A litter containment and disposal apparatus, the apparatus comprising: an open top rectangular portion having a bottom with at least one cutout opening therein and at least three sides; a base portion in communication with the bottom having a drawer, wherein the drawer is directly below and slightly larger than the at least one cutout opening; and an absorbent bag container, wherein the absorbent bag container is smaller than the drawer and adapted to fit inside the drawer and the absorbent bag container contains an absorbent material

Abstract: Circuitry for use in testing a device includes a first measurement unit to apply a forced voltage to the device, and a second measurement unit having functionality that is disabled. The second measurement unit includes a sense path to receive a sensed voltage from the device, where the sense path connects to the first measurement unit through the second measurement unit. The first measurement unit adjusts the forced voltage based on the sensed voltage.

Abstract: A semiconductor device tester includes a parametric measurement unit (PMU) stage for producing a DC test signal and a pin electronics (PE) stage for producing an AC test signal to test a semiconductor device. A driver circuit is capable of providing a version of the DC test signal and a version of the AC test signal to the semiconductor device.

Abstract: A method and apparatus is provided to recover clock information embedded in a digital signal such as a data signal. A set of strobe pulses can be generated by routing an edge generator to a delay elements with incrementally increasing delay values. A set of latches triggered by incrementally delayed signals from the edge generator can capture samples of the data signal. An encoder can convert the samples to a word representing edge time and polarity of the sampled signal. The word representing edge time can be stored in memory. An accumulator can collect the average edge time over N samples. The average edge time can be adjusted with a fixed de-skew value to form the extracted clock information. The extracted clock information can be used as a pointer to the words stored in memory.

Abstract: A test system timing method simulates the timing of a synchronous clock on the device under test. Strobe pulses can be generated by routing an edge generator to delay elements with incrementally increasing delay values. A data signal or synchronous clock signal can be applied to the input of each of a set of latches which are clocked by the strobe pulses. An encoder can convert the series of samples which are thereby latched to a word representing edge time and polarity of the sampled signal. If the sampled signal is a data signal, the word can be stored in memory. If the sampled signal is a clock signal, the word is routed to a clock bus and used to address the memory. The difference between clock edge time and data edge time is provided and can be compared against expected values.

Abstract: A system and apparatus generates a time-stamp to identify and record the time of an event such as an edge received in a data signal or clock signal. A set of strobe pulses can be generated by routing an external clock signal to delay elements with incrementally increasing delay values. A data signal or device under test clock signal can be applied to the input to each of a set of latches which are clocked by the strobe pulses. The set of latches can thereby capture a series of samples of the data signal or clock signal. The series of samples can be encoded as an edge time within a clock cycle. A clock cycle counter can be added to the edge time to generate the time stamp.

Abstract: A semiconductor device tester includes a parametric measurement unit (PMU) driver circuit that provides a DC test signal for testing a semiconductor device, and a feedback circuit that senses the DC test signal at an output of the PMU driver circuit and sends the sensed DC test signal to an input of the PMU driver circuit for compensating the DC test signal.

Abstract: A method of and system for producing signals to test semiconductor devices includes a pin electronic (PE) stage for providing a parametric measurement unit (PMU) current test signal to a semiconductor device under test. The PE stage also senses a response from the semiconductor device under test.

Abstract: In one aspect, the invention is an integrated circuit (IC) for use in testing a device. The IC includes a pin electronics (PE) driver having an output and a pin. The IC also includes a buffer connected to the output of the PE driver and the pin. The first voltage measured at the pin is greater than a second voltage measured at the output. The IC may include a first amplifier having an input connected to a voltage source. The IC may also include a second amplifier having an input connected to the output of the PE driver.

Abstract: In one aspect, the invention is an integrated circuit (IC) for use in testing a device. The IC includes a pin electronics (PE) driver having an output and a pin. The IC also includes a buffer connected to the output of the PE driver and the pin. The first voltage measured at the pin is greater than a second voltage measured at the output. The IC may include a first amplifier having an input connected to a voltage source. The IC may also include a second amplifier having an input connected to the output of the PE driver.

Abstract: An apparatus for providing current to a device under test includes a first parametric measurement unit configured to provide current to the device, and a second parametric measurement unit configured to provide current to the device.

Abstract: A method of and system for producing signals to test semiconductor devices includes a pin electronic (PE) stage for providing a parametric measurement unit (PMU) current test signal to a semiconductor device under test. The PE stage also senses a response from the semiconductor device under test.

Abstract: A semiconductor device tester includes a parametric measurement unit (PMU) stage for producing a DC test signal and a pin electronics (PE) stage for producing an AC test signal to test a semiconductor device. A driver circuit is capable of providing a version of the DC test signal and a version of the AC test signal to the semiconductor device.

Abstract: Circuitry for use in testing a device includes a first measurement unit to apply a forced voltage to the device, and a second measurement unit having functionality that is disabled. The second measurement unit includes a sense path to receive a sensed voltage from the device, where the sense path connects to the first measurement unit through the second measurement unit. The first measurement unit adjusts the forced voltage based on the sensed voltage.

Abstract: In one aspect, the invention is an integrated circuit (IC) for use in testing an analog-to-digital (ADC) converter includes a first channel of a parametric measurement unit (PMU) configured to send a force signal to the ADC. The IC also includes a first digital-to-analog converter (DAC) connected to the first channel of the PMU. The DAC has a DC level of accuracy of less than 1 millivolt. In another aspect, the invention is an integrated circuit (IC) for use in testing a digital-to-analog-converter-device-under-test (DACDUT). The IC includes a first channel of a parametric measurement unit (PMU) configured to send a force signal to the DACDUT and including an output port for taking measurements, a first digital-to-analog converter (DAC) connected to the first channel of the PMU and a PMU measurement path connected to the output port having a DC level of accuracy of less than 1 mV.